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ODTSXX08 - CMOS Gate Array

Download the ODTSXX08 datasheet PDF. This datasheet also covers the ODTSXX04 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

Description

ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ODTSXX04-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ODTSXX08
Manufacturer AMI
File Size 23.70 KB
Description CMOS Gate Array
Datasheet download datasheet ODTSXX08 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by AMI

Part Number Description
ODTSXX04 CMOS Gate Array
ODTSXX12 CMOS Gate Array
ODTSXX16 CMOS Gate Array
ODTSXX24 CMOS Gate Array
ODTSXE04 CMOS Gate Array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2'76;;[[ ® $0,+*  PLFURQ &026 *DWH $UUD Description ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs. Logic Symbol Truth Table ODTSXXxx A SL PADM A PADM LL HH HDL Syntax Verilog .................... ODTSXXxx inst_name (PADM, A); VHDL...................... inst_name: ODTSXXxx port map (PADM, A); Pin Loading Pin Name A (eq-load) ODTSXX04 9.3 Power Characteristics Cell Output Drive (mA) ODTSXX04 4 ODTSXX08 8 ODTSXX12 12 ODTSXX16 16 ODTSXX24 24 a. See page 2-15 for power equation. ODTSXX08 9.3 Load ODTSXX12 9.3 ODTSXX16 9.3 Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 198.6 TBD 220.0 TBD 240.8 TBD 263.6 TBD 282.3 ODTSXX24 11.
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