Datasheet4U Logo Datasheet4U.com

ODTHXE24 - CMOS Gate Array

Description

ODTHXE24 is a high performance, 24 mA, non-inverting, TTL-level, tristate output buffer piece with active low enable.

📥 Download Datasheet

Datasheet Details

Part number ODTHXE24
Manufacturer AMI
File Size 18.10 KB
Description CMOS Gate Array
Datasheet download datasheet ODTHXE24 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by AMI

Part Number Description
ODTHXX24 CMOS Gate Array
ODTSXE04 CMOS Gate Array
ODTSXE08 CMOS Gate Array
ODTSXE12 CMOS Gate Array
ODTSXE16 CMOS Gate Array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2'7+;( ® $0,+*  PLFURQ &026 *DWH $UUD Description ODTHXE24 is a high performance, 24 mA, non-inverting, TTL-level, tristate output buffer piece with active low enable. Logic Symbol Truth Table Pin Loading ODTHXE24 EN A PADM EN A PADM LL L LH H HX Z A EN PADM Load 3.5 eql 6.5 eql 4.93 pF HDL Syntax Verilog .................... ODTHXE24 inst_name (PADM, A, EN); VHDL...................... inst_name: ODTHXE24 port map (PADM, A, EN); Power Characteristics Parameter Static IDD (TJ = 85°C) EQLpd See page 2-15 for power equation. Value TBD 297.0 Units nA Eq-load Propagation Delays Conditions: TJ = 25°C, VDD = 5.0V, Typical Process Delay (ns) From To Parameter 15 A PADM tPLH tPHL 0.89 1.19 tHZ 1.06 EN PADM tLZ tZH 1.02 0.70 tZL 1.
Published: |