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MXI24 - CMOS Gate Array

Download the MXI24 datasheet PDF. This datasheet also covers the MXI21 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

Description

MXI2x is a family of inverting two-to-one digital multiplexers.

 PLFURQ &026 DWH $UUD MXI2x S I0 Q I1 S I0 I1 QN L LXH L HX L HX L H HXHL HDL Syntax Verilog MXI2x inst_name (QN, I0, I1, S); VHDL inst_name: MXI2x port map (QN, I0, I1, S); Pin Loadin

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MXI21-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number MXI24
Manufacturer AMI
File Size 23.64 KB
Description CMOS Gate Array
Datasheet download datasheet MXI24 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by AMI

Part Number Description
MXI21 CMOS Gate Array
MXI22 CMOS Gate Array
MXI26 CMOS Gate Array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Core Logic 0;,[ ® Description MXI2x is a family of inverting two-to-one digital multiplexers. Logic Symbol Truth Table $0,+*  PLFURQ &026 *DWH $UUD MXI2x S I0 Q I1 S I0 I1 QN L LXH L HX L HX L H HXHL HDL Syntax Verilog .................... MXI2x inst_name (QN, I0, I1, S); VHDL...................... inst_name: MXI2x port map (QN, I0, I1, S); Pin Loading Pin Name I0 I1 S MXI21 1.0 1.0 2.2 Equivalent Loads MXI22 MXI24 1.0 1.0 1.0 1.0 2.2 2.1 MXI26 1.0 1.0 2.1 Size And Power Characteristics Cell MXI21 Equivalent Gates 4.0 Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) TBD 7.2 MXI22 MXI24 MXI26 4.0 7.0 8.0 TBD TBD TBD 9.0 13.1 19.3 a. See page 2-15 for power equation.
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