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ITB1 - CMOS Gate Array

Description

ITBx is a family of inverting internal tristate buffers with active low enable.

ITB1 1.

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Datasheet Details

Part number ITB1
Manufacturer AMI
File Size 26.63 KB
Description CMOS Gate Array
Datasheet download datasheet ITB1 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Core Logic ,7%[ $0,+*  PLFURQ &026 *DWH $UUD Description ITBx is a family of inverting internal tristate buffers with active low enable. Logic Symbol Truth Table ITBx EN A QN EN A QN EN A QN HXZ L LH LHL Z = High Impedance HDL Syntax Verilog .................... ITBx inst_name (QN, A, EN); VHDL...................... inst_name: ITBx port map (QN, A, EN); Pin Loading Pin Name A EN QN ITB1 1.0 1.7 0.6 Equivalent Loads ITB2 ITB4 2.1 4.3 2.3 3.5 1.2 2.5 ITB6 6.4 4.7 3.8 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) ITB1 2.0 TBD 2.8 ITB2 3.0 TBD 5.0 ITB4 5.0 TBD 7.4 ITB6 7.0 TBD 10.9 a. See page 2-15 for power equation.
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