2.0 Description Generates up to eighteen low-skew, non-inverting clocks from one clock input Supports up to four SDRAM DIMMs 2 Uses either I C™-bus or SMBus serial int.

such ® as Intel Pentium II PC100-based systems with 100MHz SDRAM. Up to eighteen buffered, non-inverting clock outputs .

Generates up to eighteen low-skew, non-inverting clocks from one clock input Supports up to four SDRAM DIMMs 2 Uses either I C™-bus or SMBus serial interface with Read and Write capability for individual clock output control Output enable pin trista.

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