AU12 array equivalent, cmos gate array.
AU1x is a family of combinational one-bit full adders.
Logic Symbol
AU1x CI CO
A S
B
Truth Table CI A B S CO LLLLL L LHHL LHLHL L HH L H HL LHL HLHLH HHL LH HHHHH
HDL Syntax Verilog AU1x inst_name (CO, S, A, B, CI); VHDL.. inst_name: AU1x port ma.
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