AK8122 buffer equivalent, differential zero delay clock buffer.
Operational Frequency Range: 160MHz
– 400MHz Output delay: -30 ±100ps Low Jitter Performance:
20 ps (Period RMS 190
– 360MHz) 30 ps (cycle.
DDR2 SDRAM Clock Buffer
Block Diagram
TSTI (VSS) CLKP P CLKN
FBINP
BIAS
TSTO (VDD) L P F V C O
1/2
C P
OUTP
F C
.
The AK8122 is a high performance differential zero delay clock buffer IC with Phase Locked Loop (PLL). Target application is DDR2 SDRAM and characteristics of these ICs are acceptable to standards of JEDEC.
Supply Voltage: 1.8 ±0.1V Operating Temper.
Image gallery
TAGS
Download (Size : 348.31KB)