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AK491024G - 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory

Download the AK491024G datasheet PDF. This datasheet also covers the AK491024S variant, as both devices belong to the same 1048576 word x 9 bit cmos dynamic random access memory family and are provided as variant models within a single manufacturer datasheet.

General Description

The Accutek AK491024 high density memory module is a random access memory organized in 1 Meg x 9 bit words.

The assembly consists of nine standard 1 Meg x 1 DRAMs in plastic leaded chip carriers (SOJ) mounted on the front side of a printed circuit board.

Key Features

  • 1,048,576 x 9 bit organization.
  • Optional 30 Pad leadless SIM (Single In-Line Module) or 30 Pin leaded SIP (Single In-Line Package).
  • JEDEC standard pinout.
  • Common CAS and RAS control for the lower eight bits.
  • Separate PCAS control for D9 and Q9.
  • CAS-before-RAS refresh.
  • Power 3.465 Watt Max Active (80 nSEC) 2.97 Watt Max Active (100 nSEC) 2.475 Watt Max Active (120 nSEC) 49.5 mW Max Standby.
  • Operating free air temperature 00C to 700C.
  • Upward compatibl.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AK491024S-ACCUTEK.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number AK491024G
Manufacturer ACCUTEK
File Size 154.82 KB
Description 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory
Datasheet download datasheet AK491024G Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MICROCIRCUIT CORPORATION DESCRIPTION The Accutek AK491024 high density memory module is a random access memory organized in 1 Meg x 9 bit words. The assembly consists of nine standard 1 Meg x 1 DRAMs in plastic leaded chip carriers (SOJ) mounted on the front side of a printed circuit board. The module can be configured as a leadless 30 pad SIM or a leaded 30 pin SIP. This packaging approach provides a 6 to 1 density increase over standard DIP packaging. The operation of the AK491024 is identical to nine 1 Meg x 1 DRAMs. For the lower eight bits data input is tied to the data output and brought out separately for each device, with common RAS, CAS control. This common I/O feature dictates the use of early-write cycles to prevent contention of D and Q.