AVR200856 sdram equivalent, ddr2 sdram.
* VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V
* JEDEC-standard 1.8V I/O (SSTL_18-compatible)
* Differential data strobe (DQS, DQS#) option
* 4n-bit prefetch arc.
The DDR2 SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls. .
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