| Part Number | M2V28S40ATP |
| Manufacturer | Mitsubishi |
| Title | 128M Synchronous DRAM |
| Description | M2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and M2V28S30ATP is organized as 4-bank x 4,194,3... |
| Features |
M2V28S20/30/40ATP ITEM tCLK tRAS tRCD tAC tRC Icc1 Clock Cycle Time Row to Column Delay Access Time from CLK Ref/Active Command Period Operation Current (Max.) (Single Bank) (Max.) (Min.) (Min.) (Min.) (Max.) (CL=3) (Min.) V28S20 V28S30 V28S40 Icc6 S...
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| Datasheet |
 M2V28S40ATP Datasheet 626.92KB |
