| Description | ODCHXX24 is a high performance, 24 mA, non-inverting, TTL-level output buffer piece. Logic Symbol Truth Table Pin Loading ODCHXX24 A A PADM LL HH Load A 14.5 eql PADM HDL Syntax Verilog .. ODCHXX24 inst_name (PADM, A); VHDL.... inst_name: ODCHXX24 port map (PADM, A); Power Characteristics Parameter Static IDD (TJ = 85°C) EQLpd See page 2-15 for power e... |
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| Datasheet |
 ODCHXX24 Datasheet - 17.40KB |
