| Part Number | 74LS73 |
| Manufacturer | Fairchild Semiconductor |
| Title | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| Description | This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-... |
| Features |
uit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Tabl...
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| Datasheet |
 74LS73 Datasheet
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