| Part Number | Description | Manufacture |
|---|---|---|
|
|
4M x 16 x 4 Banks MOBILE SDRAM • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharge • Programmable burst lengths: 1, 2, 4, 8, or |
 Micron Technology |
|
|
256M x 16 Mobile SDRAM • Temperature Compensated Self Refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharg |
Micron Technology |
|
|
256M x 16 Mobile SDRAM • Temperature Compensated Self Refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharg |
Micron Technology |
