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SpectraLinear
SpectraLinear


W191

Skew Controlled SDRAM Buffer



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W191 pdf
W191
Skew Controlled SDRAM Buffer
Features
• Six skew controlled CMOS outputs
• Output skew between any two outputs is less than 150 ps
• SMBus Serial configuration interface
www.DataSheet24.U5.cnosmto 5 ns propagation delay
• DC to 133 MHz operation (Commercial)
• DC to 100 MHz operation (Industrial)
• Single 3.3V supply voltage
• Low power CMOS design packaged in a 16-pin SSOP
(Small Shrink Outline Package)
Block Diagram
Key Specifications
Supply Voltages: ...................................... VDDQ3 = 3.3V ±5%
Operating Temperature: (Commercial) ............. 0°C to +70°C
Operating Temperature: (Industrial) .............. –40°C to +85°C
Input Threshold:...................................................1.5V typical
Maximum Input Voltage: .................................. VDDQ3 + 0.5V
Input Frequency: (Commercial) ........................0 to 133 MHz
Input Frequency: (Industrial).............................0 to 100 MHz
BUF_IN to SDRAM0:5 Propagation Delay:.......2.5 ns to 5 ns
Min. Output Edge Rate: ............................................. 1.0V/ns
Max. Output Skew: ..................................................... 150 ps
Output Duty Cycle:...................................45/55% worst case
Output Impedance: ...................................................15: typ.
Pin Configuration[1]
SDATA
SCLOCK
SMBus
Device Control
BUF_IN
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM0
GND
SDRAM1
BUF_IN
GND
SDRAM2
VDDQ3
SDATA
1
2
3
4
5
6
7
8
16 VDDQ3
15 SDRAM5
14 GND
13 SDRAM4
12 VDDQ3
11 SDRAM3
10 GND
9 SCLK
Note:
1. Internal pull-up resistor of 250K on SDATA and SCLK.
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555 Fax:(408) 855-0550
Page 1 of 9
www.SpectraLinear.com



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W191 pdf
W191
Pin Definitions
Pin Name
SDRAM0:5
Pin No.
1, 3, 6,
11, 13, 15
BUF_IN
SDATA
4
8
www.DataSheeSt4CUL.cOoCmK
VDDQ3
9
7, 12, 16
GND
2, 5, 10,
14
Pin
Type
O
I
I/O
I
P
G
Pin Description
SDRAM Outputs: Provides buffered copy of BUF_IN. The propagation delay from a
rising input edge to a rising output edge is 2.5 to 5 ns. All outputs are skew controlled
to within ±150 ps of each other.
Clock Input: This clock input has an input threshold voltage of 1.5V (typ).
SMBus Data input: Data should be presented to this input as described in the SMBus
section of this data sheet. Internal 250-k: pull-up resistor.
SMBus clock input: The SMBus Data clock should be presented to this input as
described in the SMBus section of this data sheet. Internal 250-k: pull-up resistor.
Power Connection: Power supply for core logic and output buffers. Connected to
3.3V supply.
Ground Connection: Connect all ground pins to the common system ground plane.
Overview
The W191 is a skew controlled fanout buffer optimized for
interface with registered DIMMs.
Functional Description
Output Drivers
The W191 output buffers are CMOS type which deliver a
rail-to-rail (GND to VDD) output voltage swing into a nominal
capacitive load. Thus, output signaling is both TTL and CMOS
level compatible. Nominal output buffer impedance is 15:.
Serial Control
Serial control data is written to the W191 in ten bytes of eight
bits each. Bytes are written in the order shown in Table 1
Writing Data Bytes
Each bit in the data bytes control a particular device function.
Bits are written MSB (most significant bit) first, which is bit 7.
Table 1 gives the bit formats for registers located in Data
Bytes 0-2.
Table 1. Byte Writing Sequence
Byte
Sequence
Byte Name
Bit Sequence
1
Slave Address
11010010
2 Command Code Don’t Care
3
Byte Count
Don’t Care
4
Data Byte 0
Refer to
5
Data Byte 1
Table 2
6 Data Byte 2
7
Data Byte 3
Don’t Care
8 Data Byte 4
9 Data Byte 5
10 Data Byte 6
Byte Description
Commands the W191 to accept the bits in Data Bytes 0-6 for internal
register configuration. Since other devices may exist on the same
common serial data bus, it is necessary to have a specific slave address
for each potential receiver. The slave receiver address for the W191 is
11010010. Register setting will not be made if the Slave Address is not
correct (or is for an alternate slave receiver).
Unused by the W191, therefore bit values are ignored (don’t care). This
byte must be included in the data write sequence to maintain proper byte
allocation. The Command Code Byte is part of the standard serial
communication protocol and may be used when writing to another
addressed slave receiver on the serial data bus.
Unused by the W191, therefore bit values are ignored (don’t care). This
byte must be included in the data write sequence to maintain proper byte
allocation. The Byte Count Byte is part of the standard serial communi-
cation protocol and may be used when writing to another addressed slave
receiver on the serial data bus.
The data bits in these bytes set internal W191 registers that control device
operation. The data bits are only accepted when the Address Byte bit
sequence is 11010010, as noted above. For description of bit control
functions, refer to Table 2.
Rev 1.0, November 20, 2006
Page 2 of 9



Part Number W191
Description Skew Controlled SDRAM Buffer
Maker SpectraLinear - SpectraLinear
Total Page 9 Pages
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