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Cypress Semiconductor Electronic Components Datasheet



W185-5

Six Output Peak Reducing EMI Solution



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W185-5 pdf
W185
Six Output Peak Reducing EMI Solution
Features
Table 1. Modulation Width Selection
Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Six 1.25%, 3.75%, or 0% down or center spread outputs
• One non-Spread output of Reference input
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 24-pin SSOP (Shrink Small Outline
Package)
• Outputs may be selectively disabled
Key Specifications
Supply Voltages: ........................................... VDD = 3.3V±5%
or VDD = 5V±10%
Frequency Range: ............................ 28 MHz Fin 75 MHz
Crystal Reference Range:................. 28 MHz Fin 40 MHz
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
SS%
0
1
W185
Output
Fin Fout Fin – 1.25%
Fin Fout Fin – 3.75%
W185-5
Output
Fin + 0.625% Fin
– 0.625%
Fin + 1.875% Fin
–1.875%
Table 2. Frequency Range Selection
FS2 FS1
00
01
10
11
Table 3. Output Enable
Frequency Range
28 MHz FIN 38 MHz
38 MHz FIN 48 MHz
46 MHz FIN 60 MHz
58 MHz FIN 75 MHz
EN1
0
0
1
EN2
0
1
0
CLK0:4
Low
Low
Active
CLK5
Low
Active
Low
1 1 Active
Active
Simplified Block Diagram
Pin Configuration
3.3V or 5.0V
XTAL
Input
40MHz
max.
X1
X2
W185
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Oscillator or
Reference Input
W185
Spread Spectrum
Output
(EMI suppressed)
SSOP
REFOUT
FS2
X1
X2
GND
SS%
EN2
GND
CLK0
VDD
CLK1
CLK2
1
2
3
4
5
6
7
8
9
10
11
12
24 SSON#
23 RESET
22 FS1
21 VDD
20 VDD
19 NC
18 EN1
17 CLK5
16 VDD
15 CLK4
14 GND
13 CLK3
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
July 25, 2000, rev. *A



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W185-5 pdf
W185
Pin Definitions
Pin Name
CLK0:5
CLKIN or X1
Pin No.
9, 11, 12, 13,
15, 17
3
NC or X2
SS%
4
6
Reset
23
REFOUT
1
EN1:2
SSON#
18, 7
24
FS1:2
VDD
GND
NC
22, 2
10, 16, 20, 21
5, 8, 14
19
Pin
Type
O
I
I
I
I
O
I
I
I
P
G
NC
Pin Description
Modulated Frequency Outputs: Frequency modulated copies of the unmod-
ulated input clock (SSON# asserted).
Crystal Connection or External Reference Frequency Input: This pin has
dual functions. It may either be connected to an external crystal, or to an
external reference clock.
Crystal Connection: If using an external reference, this pin must be left un-
connected.
Modulation Width Selection: When Spread Spectrum feature is turned on,
this pin is used to select the amount of variation and peak EMI reduction that
is desired on the output signal. This pin has an internal pull-up resistor.
ModulationProfile Restart: A rising edge on this input restarts the modulation
pattern at the beginning of its defined path. This pin has an internal pull-down
resistor.
Non-Modulated Output: This pin provides a copy of the reference frequency.
This output will not have the Spread Spectrum feature enabled regardless of
the state of logic input SSON#.
Output Enable Select Pins: These pins control the activity of specific output
buffers. See Table 3 on page 1.
Spread Spectrum Control (Active LOW): Asserting this signal (active LOW)
turns the internal modulation waveform on. This pin has an internal pull-down
resistor.
Frequency Selection Bit 1 and 2: These pins select the frequency of opera-
tion. Refer to Table 1. These pins have internal pull-up resistors.
Power Connection: Connected to 3.3V or 5V power supply.
Ground Connection: This should be connected to the common ground plane.
No Connect: This pin should be left floating.
2



Part Number W185-5
Description Six Output Peak Reducing EMI Solution
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 8 Pages
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