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Cypress Semiconductor Electronic Components Datasheet



W155

Spread Spectrum Frequency Timing Generator



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W155 pdf
W155
Spread Spectrum Frequency Timing Generator
Features
• Generates a spread spectrum timing signal (SYSCLK)
and a non-spread signal (USBCLK)
• Requires a 14.318-MHz crystal for operation
• Supports MIPS microprocessor clock frequencies
• Reduces peak EMI by as much as 12 dB
• Integrated loop filter components
• Cycle-to-cycle jitter = 250 ps (max)
• Operates with a 3.3 or 5.0V power supply
• Spread output is selectable from 10 to 133 MHz
• TEST mode supports modulation off (High-Z) and spe-
cial test input reference frequency
• Guaranteed 45/55 duty cycle
• Packaged in a 16-pin, 300-mil-wide SOIC (Small Outline
Integrated Circuit)
Overview
The W155 incorporates the latest advances in PLL-based
spread spectrum frequency synthesizer technology. By fre-
quency modulating the SYSCLK output with a low-frequency
carrier, peak EMI can be greatly reduced in a system. Use of
this technique allows systems to pass increasingly difficult EMI
testing without resorting to costly shielding or redesign.
In a system that uses the W155, not only is EMI reduced in the
various clock lines, but also in all signals which are synchro-
nized to SYSCLK. Therefore, the benefits of using this tech-
nique increase with the number of address and data lines in
the system.
The W155 is specifically targeted toward MIPS microproces-
sor based systems where EMI is of particular concern. Each
device uses a single 14.318-MHz crystal to generate a select-
able spread spectrum output and an unmodulated 48-MHz
USB Output.
The spreading function can be disabled by taking the SSON#
pin high. Spread percentage can be selected with the SS%
input (see Table 2 below).
Table 1. Frequency Selection (14.318-MHz Reference)
SYSCLK
FS3 FS2 FS1 FS0 (Output Freq.)
0 0 0 0 133.3 MHz
0001
120 MHz
0010
100 MHz
0 0 1 1 74.77 MHz
0100
70 MHz
0101
66.6 MHz
0110
60 MHz
0111
50 MHz
1000
40 MHz
1 0 0 1 33.33 MHz
1010
30 MHz
1011
25 MHz
1100
20 MHz
1 1 0 1 16.67 MHz
1110
12 MHz
1111
10 MHz
Table 2. Spread Percentage Selection
SS%
0
1
Spread Percentage
–1.25%
–3.75%
[1]
Pin Configuration
VDD
X1
X2
GND
FS3*
VDD
FS2*
FS1*
1
2
3
4
5
6
7
8
16 TEST
15 VDD
14 USBCLK/SS%*
13 GND
12 SYSCLK
11 GND
10 FS0*
9 SSON#^
Note:
1. Internal pull-up resistor present on inputs marked with ‘*’ and pull-down
resistor present on input marked with ‘^’.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
September 29, 1999, rev. **



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W155 pdf
W155
Pin Definitions
Pin Name
Pin No.
USBCLK/
SS%
14
SYSCLK
FS0:3
SSON#
X1
X2
TEST
VDD
GND
12
10, 8, 7, 5
9
2
3
16
1, 6, 15
4, 11, 13
Pin Type
I/O
O
I
I
I
I
I
P
G
Pin Description
USB Clock Output/Modulation Width Selection Input: When an input; if spread
spectrum feature is enabled, this pin is used to select the amount of frequency
variation on the SYSCLK output (see Table 2). Wider variations result in greater
peak EMI reduction. When an output: supplies a non-spread 48-MHz signal for
USB support.
System Clock Output: Frequency is selected per Table 1. Spread spectrum fea-
ture is controlled by pins 9 & 14.
Frequency Select Pins: These pins set the frequency of the signal provided at
the SYSCLK output.
Spread Spectrum Control (active LOW): Pulling this input signal HIGH turns the
internal modulating waveform off. This pin has an internal pull-down resistor.
Crystal Connection or External Reference Frequency Input: This pin has dual
functions. It can be used as either an external crystal connection, or as an external
reference frequency input.
Crystal Connection: If using an external reference, this pin must be left uncon-
nected.
Test Mode: For normal operation, tie this pin to ground.
Power Connection: Connected to either 3.3V or 5.0V power supply. All VDD pins
must be the same voltage level.
Ground Connection: Connect to the common system ground plane.
2



Part Number W155
Description Spread Spectrum Frequency Timing Generator
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 6 Pages
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