94 7890 e
1 VS Supply voltage
2 RFi RF input
3 P Progamming port IP3, CP
4 SO Output symmetry
5 IFO IF output
6 GND Ground
7 LOi LO input
8 PD Power down
The IC is designed for a supply voltage of 2.7 to 5.5 V. As
the IC is internally stabilized, the performance of the
circuit is nearly independent of the supply voltage.
WInput impedance, ZRFi, is about 700 with an additional
capacitive component. This condition provides the best
noise figure in combination with a matching network.
3. Order Intercept Point (IP3)
Voltage divider, RP / R1, determinates both the input and
output intercept point, IIP3 and OIP3. If RP is infinity the
IIP3 has the maximum of about – 4 dBm.
Current Consumption, IS
Depending on the chosen input and output conditions of
the IC, the current consumption, IS, is between 4 mA and
10 mA. The current consumption in dependence of Rp is
shown in figure 4.
This feature provides an extension of battery life. If this
function is not used, Pin 8 has to be connected to VS
The symmetry of the load current can be matched and so
be optimized for a given load impedance.
The IP3/RP characteristics are shown in figure 1 and 2.
Output Impedance and Intercept Point
Output impedance is shown in figure 9.
Both low output impedance and a high intercept point are
with reference to a high value of RP.
Rev. A2: 08.06.1995