TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
2 GBIT (256M × 8 BIT) CMOS NAND E2PROM
The TC58BVG1S3HBAI6 is a single 3.3V 2 Gbit (2,214,592,512 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 2048blocks.
The device has a 2112-byte static register which allows program and read data to be transferred between the
register and the memory cell array in 2112-bytes increments. The Erase operation is implemented in a single block
unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages).
The TC58BVG1S3HBAI6 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
The TC58BVG1S3HBAI6 has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected
Memory cell array 2112 × 128K × 8
2112 × 8
(128K + 4K) bytes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Read, Multi Page Program, Multi Block Erase, ECC Status Read
• Mode control
• Number of valid blocks
Min 2008 blocks
Max 2048 blocks
• Power supply
VCC = 2.7V to 3.6V
• Access time
Cell array to register 40 µs typ. (Single Page Read) / 55us typ. (Multi Page Read)
Serial Read Cycle 25 ns min (CL=50pF)
• Program/Erase time
Auto Page Program
Auto Block Erase
330 µs/page typ.
2.5 ms/block typ.
• Operating current
Read (25 ns cycle)
30 mA max.
30 mA max
30 mA max
50 µA max
P-VFBGA67-0608-0.80-001 (Weight: 0.095 g typ.)
• 8bit ECC for each 528Byte is implemented on the chip.