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N01L83W2A

1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 8 bit



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N01L83W2Awww.DataSheet4U.com
1Mb Ultra-Low Power Asynchronous CMOS SRAM
128K × 8 bit
Overview
The N01L83W2A is an integrated memory device
containing a 1 Mbit Static Random Access Memory
organized as 131,072 words by 8 bits. The device
is designed and fabricated using ON
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. The
N01L83W2A is optimal for various applications
where low-power is critical such as battery backup
and hand-held devices. The device can operate
over a very wide temperature range of -40oC to
+85oC and is available in JEDEC standard
packages compatible with other standard 128Kb x
8 SRAMs.
Features
• Single Wide Power Supply Range
2.3 to 3.6 Volts
• Very low standby current
2.0µA at 3.0V (Typical)
• Very low operating current
2.0mA at 3.0V and 1µs (Typical)
• Very low Page Mode operating current
0.8mA at 3.0V and 1µs (Typical)
• Simple memory control
Dual Chip Enables (CE1and CE2)
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.8V
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
Product Family
Part Number
N01L83W2AT
N01L83W2AN
N01L83W2AT2
N01L83W2AN2
Package Type
Operating
Temperature
Power
Supply
(Vcc)
Speed
Standby
Operating
Current (ISB), Current (Icc),
Typical
Typical
32 - TSOP I
32 - STSOP I
32 -TSOP I Green
-40oC to +85oC
2.3V - 3.6V
55ns @ 2.7V
70ns @ 2.3V
2 µA
2 mA @ 1MHz
32 - STSOP I Green
Pin Configuration
Pin Descriptions
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-Pin
STSOP-I
TSOP-I
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
VSS
I/O2
I/O1
I/O0
A0
A1
A2
A3
Pin Name
A0-A16
WE
CE1, CE2
OE
I/O0-I/O7
VCC
VSS
NC
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Data Inputs/Outputs
Power
Ground
Not Connected
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 10
Publication Order Number:
N01L83W2A/D



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N01L83W2A pdf
N01L83W2A
Functional Block Diagram
Address
IAn0p-utAs3
Word
Address
Decode
Logic
Address
Inputs
A4 - A16
Page
Address
Decode
Logic
8K Page
x 16 word
x 8 bit
RAM Array
CE1
CE2
WE
OE
Control
Logic
www.DataSheet4U.com
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
Functional Description
CE1 CE2 WE
OE
I/O0 - I/O7
MODE
POWER
HXXX
XLXX
L H L X2
High Z
High Z
Data In
Standby1
Standby1
Write2
Standby
Standby
Active
L HH L
L HHH
Data Out
High Z
Read
Active
Active
Active
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated
from any external influence and disabled from exerting any influence externally.
2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
CIN VIN = 0V, f = 1 MHz, TA = 25oC
CI/O VIN = 0V, f = 1 MHz, TA = 25oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
8 pF
8 pF
Rev. 10 | Page 2 of 10 | www.onsemi.com



Part Number N01L83W2A
Description 1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 8 bit
Maker ON Semiconductor - ON Semiconductor
Total Page 10 Pages
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