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Freescale Semiconductor Electronic Components Datasheet



MC100ES6220

Low Voltage Dual 1:10 Differential ECL/PECL Clock Fanout Buffer



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MC100ES6220 pdf
Freescale Semiconductor
Technical Data
Low Voltage Dual 1:10 Differential
ECL/PECL Clock Fanout Buffer
MC100ES6220
Rev 4, 04/2005
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MC100ES6220
The MC100ES6220 is a bipolar monolithic differential clock fanout buffer.
Designed for most demanding clock distribution systems, the MC100ES6220
supports various applications that require the distribution of precisely aligned
differential clock signals. Using SiGe technology and a fully differential
architecture, the device offers very low skew outputs and superior digital signal
characteristics. Target applications for this clock driver are high performance
clock distribution in computing, networking and telecommunication systems.
LOW VOLTAGE DUAL
1:10 DIFFERENTIAL ECL/PECL
CLOCK FANOUT BUFFER
Features
• Two independent 1:10 differential clock fanout buffers
• 130 ps maximum device skew
• SiGe technology
• Supports DC to 1 GHz operation of clock or data signals
• ECL/PECL compatible differential clock outputs
• ECL/PECL compatible differential clock inputs
• Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply
• Standard 52-lead LQFP package with exposed pad for enhanced thermal
characteristics
• Supports industrial temperature range
• Pin and function compatible to the MC100EP220
• 52-lead Pb-free Package Available
Functional Description
TB SUFFIX
52-LEAD LQFP PACKAGE
EXPOSED PAD
CASE 1336A-01
AE SUFFIX
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 1336A-01
The MC100ES6220 is designed for low skew clock distribution systems and
supports clock frequencies up to 1 GHz. The device consists of two independent
clock fanout buffers. The CLKA and CLKB inputs can be driven by ECL or PECL compatible signals. The input signal of each
clock buffer is distributed to 10 identical, differential ECL/PECL outputs. If VBB is connected to the CLKA or CLKB input and
bypassed to GND by a 10 nF capacitor, the MC100ES6220 can be driven by single-ended ECL/PECL signals utilizing the VBB
bias voltage output.
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even
if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts
being used on that side should be terminated.
The MC100ES6220 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the
MC100ES6220 supports positive (PECL) and negative (ECL) supplies. The MC100ES6220 is pin and function compatible to the
MC100EP220.
© Freescale Semiconductor, Inc., 2005. All rights reserved.



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MC100ES6220 pdf
Fanout Buffer A
VCC
QA0
QA0
QA1
QA1
CLKA
CLKA
VEE
Fanout Buffer B
VCC
QA8
QA8
QA9
QA9
QB0
QB0
QB1
QB1
CLKB
CLKB
QB8
VEE
QB8
QB9
QB9
VBB
Figure 1. MC100ES6220 Logic Diagram
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39 38 37 36 35 34 33 32 31 30 29 28 27
VCC 40
26
QA5 41
25
QA5 42
24
QA4 43
23
QA4 44
22
QA3 45
MC100ES6220
21
QA3 46
20
QA2 47
19
QA2 48
18
QA1 49
17
QA1 50
16
QA0 51
15
QA0
52 14
1 2 3 4 5 6 7 8 9 10 11 12 13
QB2
QB2
QB3
QB3
QB4
QB4
QB5
QB5
QB6
QB6
QB7
QB7
VCC
Figure 2. 52-Lead Package Pinout (Top View)
Table 1. Pin Configuration
Pin I/O Type
Function
CLKA, CLKA
Input
ECL/PECL
Differential reference clock signal input for fanout buffer A
CLKB, CLKB
Input
ECL/PECL
Differential reference clock signal input for fanout buffer B
QA[0-9], QA[0-9]
Output
ECL/PECL
Differential clock outputs of fanout buffer A
QB[0-9], QB[0-9]
VEE(1)
VCC
Output
Supply
Supply
ECL/PECL
Differential clock outputs of fanout buffer B
Negative power supply
Positive power supply. All VCC pins must be connected to the positive
power supply for correct DC and AC operation.
VBB
Output
DC
Reference voltage output for single ended ECL and PECL operation
1. In ECL mode (negative power supply mode), VEE is either –3.3 V or –2.5 V and VCC is connected to GND (0 V). In PECL mode (positive
power supply mode), VEE is connected to GND (0 V) and VCC is either +3.3 V or +2.5 V. In both modes, the input and output levels are
referenced to the most positive supply (VCC).
MC100ES6220
2
Advanced Clock Drivers Devices
Freescale Semiconductor



Part Number MC100ES6220
Description Low Voltage Dual 1:10 Differential ECL/PECL Clock Fanout Buffer
Maker Freescale Semiconductor - Freescale Semiconductor
Total Page 12 Pages
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