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  NEC Electronic Components Datasheet  


MC-4564EC726

64 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE


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MC-4564EC726 pdf
DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4564EC726
64 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE
REGISTERED TYPE
Description
The MC-4564EC726 is a 67,108,864 words by 72 bits synchronous dynamic RAM module on which 36 pieces of
128 M SDRAM: µPD45128441 are assembled.
These modules provide high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
67,108,864 words by 72 bits organization (ECC type)
Clock frequency and access time from CLK
Part number
/CAS latency
Clock frequency
(MAX.)
Access time from CLK
(MAX.)
Module type
MC-4564EC726EFB-A80
CL = 3
125 MHz
6 ns PC100 Registered DIMM
CL = 2
100 MHz
6 ns Rev. 1.2 Compliant
MC-4564EC726EFB-A10
CL = 3
100 MHz
6 ns
5 MC-4564EC726PFB-A80
CL = 2
CL = 3
77 MHz
125 MHz
7 ns
6 ns
CL = 2
100 MHz
6 ns
5 MC-4564EC726PFB-A10
CL = 3
100 MHz
6 ns
CL = 2
77 MHz
7 ns
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
Pulsed interface
Possible to assert random column address in every cycle
Quad internal banks controlled by BA0 and BA1 (Bank Select)
Programmable burst-length (1, 2, 4, 8 and Full Page)
Programmable wrap sequence (Sequential / Interleave)
Programmable /CAS latency (2, 3)
Automatic precharge and controlled precharge
CBR (Auto) refresh and self refresh
All DQs have 10 Ω ± 10 % of series resistor
Single 3.3 V ± 0.3 V power supply
LVTTL compatible
4,096 refresh cycles / 64 ms
Burst termination by Burst Stop command and Precharge command
168-pin dual in-line memory module (Pin pitch = 1.27 mm)
Registered type
Serial PD
Stacked monolithic technology
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14460EJ2V0DS00 (2nd edition)
Date Published February 2000 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1999



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MC-4564EC726
Ordering Information
Part number
Clock frequency
(MAX.)
Package
Mounted devices
MC-4564EC726EFB-A80
MC-4564EC726EFB-A10
125 MHz
100 MHz
168-pin Dual In-line Memory Module 36 pieces of µPD45128441G5 (Rev. E)
(Socket Type)
(10.16 mm (400) TSOP (II))
5 MC-4564EC726PFB-A80
5 MC-4564EC726PFB-A10
125 MHz
100 MHz
Edge connector: Gold plated
43.18 mm height
36 pieces of µPD45128441G5 (Rev. P)
(10.16 mm (400) TSOP (II))
2 Data Sheet M14460EJ2V0DS00



Part Number MC-4564EC726
Description 64 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE
Maker NEC - NEC
Total Page 16 Pages
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MC-4564EC727 64M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE MC-4564EC727
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