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Elite Semiconductor Memory Technology
Elite Semiconductor Memory Technology


M13S64164A

1M x 16 Bit x 4 Banks Double Data Rate SDRAM



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Revision History
Revision 0.1 (23 Oct. 2006)
- Original
Revision 0.2 (06 Jun. 2007)
- Add BGA type spec
Revision 0.3 (20 Jul. 2007)
- Modify BGA assignment
Preliminary
M13S64164A
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 0.3
1/49



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M13S64164A pdf
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Preliminary
M13S64164A
DDR SDRAM
1M x 16 Bit x 4 Banks
Double Data Rate SDRAM
Features
z JEDEC Standard
z Internal pipelined double-data-rate architecture, two data access per clock cycle
z Bi-directional data strobe (DQS)
z On-chip DLL
z Differential clock inputs (CLK and CLK )
z DLL aligns DQ and DQS transition with CLK transition
z Quad bank operation
z CAS Latency : 2, 2.5, 3
z Burst Type : Sequential and Interleave
z Burst Length : 2, 4, 8
z All inputs except data & DM are sampled at the rising edge of the system clock(CLK)
z Data I/O transitions on both edges of data strobe (DQS)
z DQS is edge-aligned with data for reads; center-aligned with data for WRITE
z Data mask (DM) for write masking only
z For 2.5V parts, VDD = 2.3V ~ 2.7V, VDDQ = 2.3V ~ 2.7V
z Auto & Self refresh
z 64ms refresh period, 4K cycle
z SSTL-2 I/O interface
z 66pin TSOPII package
Ordering information :
PRODUCT NO.
MAX FREQ
M13S64164A -5TG
200MHz
M13S64164A -6TG
166MHz
M13S64164A -5BG
200MHz
M13S64164A -6BG
166MHz
VDD
2.5V
2.5V
PACKAGE COMMENTS
66TSOPII
Pb-free
BGA
Pb-free
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 0.3
2/49



Part Number M13S64164A
Description 1M x 16 Bit x 4 Banks Double Data Rate SDRAM
Maker Elite Semiconductor Memory Technology - Elite Semiconductor Memory Technology
Total Page 30 Pages
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M13S64164A 1M x 16 Bit x 4 Banks Double Data Rate SDRAM M13S64164A
Elite Semiconductor Memory Technology
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