The documentation and process conversion
measures necessary to comply with this document
shall be completed by 3 October 2005.
3 July 2005
8 July 2004
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, UNITIZED DUAL TRANSISTOR, NPN, SILICON,
TYPES 2N2919, 2N2920, 2N2919L, 2N2920L, 2N2919U, AND 2N2920U,
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1.1 Scope. This specification covers the performance requirements for two electrically isolated, matched NPN
silicon transistors as one dual unit. Four levels of product assurance are provided for each device type as specified
in MIL-PRF-19500. Two levels of product assurance are provided for die.
1.2 Physical dimensions. See figure 1 (similar to TO-78), figure 2 (surface mount), figure 3 (JANHCA and
JANKCA die), figure 4 (JANHCB and JANKCB die).
* 1.3 Maximum ratings, unless otherwise specified, TC =+25°C.
TA = +25°C
TC = +25°C
One Both One Both
section sections section sections
TJ and TSTG
W mA V dc V dc V dc
300 600 750 1.25
70 60 6 -65 to +200
(1) For TA > +25°C, derate linearly 1.71 mW/°C, one section; 3.43 mW/°C, both sections.
(2) For TC > +25°C, derate linearly 4.286 mW/°C, one section; 7.14 mW/°C, both sections.
* Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at http://assist.daps.dla.mil .