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ICS9DB403D

Four Output Differential Buffer



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ICS9DB403D pdf
Four Output Differential Buffer for PCIe Gen 1 and Gen 2
DATASHEET
ICS9DB403D
Description
Features/Benefits
The ICS9DB403 is compatible with the Intel DB400v2 Differential
Buffer Specification.This buffer provides 4 PCI-Express Gen2 clocks.
The ICS9DB403 is driven by a differential output pair from a
CK410B+, CK505 or CK509B main cloc k generator.
Spread spectr um modulation toler ant, 0 to -0.5% do wn
spread and +/- 0.25% center spread.
Supports undr iven differential outputs in PD# and
SRC_STOP# modes for power management.
Output Features
• 4 - 0.7V current-mode diff erential output pairs
• Supports zero delay buffer mode and f anout mode
• Bandwidth programming available
• 50-100 MHz operation in PLL mode
• 50-400 MHz operation in Bypass mode
Key Specifications
• Outputs cycle-cycle jitter < 50ps
• Outputs skew: 50ps
• Phase jitter: PCIe Gen1 < 86ps peak to peak
• Phase jitter: PCIe Gen2 < 3.0/3.1ps rms
• 28-pin SSOP/TSSOP pacakge
• Available in RoHS compliant packaging
• Supports Commercial (0 to +70°C) and Industrial (-40 to
+85°C) temperature ranges
Functional Block Diagram
24
OE-(O6,5E,(26,1, )1)
SRC_IN
SRC_IN#
SPREAD
COMPATIBLE
PLL
4
M
STOP
U LOGIC
X
DIF(6,5,2,1)
PD
BYPASS#/PLL
SDATA
SCLK
CONTROL
LOGIC
IREF
Note: Polarities shown for OE_INV = 0.
IDT® Four Output Differential Buffer for PCIe and Gen 1 and Gen 2
1
ICS9DB403D REV R 11/1/12
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ICS9DB403D pdf
ICS9DB403D
Four Output Differential Buffer for PCIe for Gen 1 and Gen 2
Pin Configuration
VDDR 1
28 VDDA
SRC_IN 2
27 GNDA
SRC_IN# 3
26 IREF
GND 4
25 OE_INV
VDD 5
24 VDD
DIF_1 6
23 DIF_6
DIF_1# 7
22 DIF_6#
OE_1 8
21 OE_6
DIF_2 9
20 DIF_5
DIF_2# 10
19 DIF_5#
VDD 11
18 VDD
BYPAS S#/PLL 12
17 HIGH_BW#
SCLK 13
16 DIF_STOP#
SDATA 14
15 PD#
OE_INV = 0
VDDR 1
28 VDDA
SRC_IN 2
27 GNDA
SRC_IN# 3
26 IREF
GND 4
25 OE_INV
VDD 5
24 VDD
DIF_1 6
23 DIF_6
DIF_1# 7
22 DIF_6#
OE1# 82
1 OE6#
DIF_2 9
20 DIF_5
DIF_2# 10
19 DIF_5#
VDD 11
18 VDD
BYPA SS#/PLL 12
17 HIGH_BW#
SCLK 13
16 DIF_STOP
SDATA 14
15 PD
OE_INV = 1
28-pin SSOP & TSSOP
Polarity Inversion Pin List Table
OE_INV
Pins 01
8 OE_1
O E1#
15 PD#
PD
16
D IF _ST O P#
DIF _ST O P
21 OE_6
O E6#
Power Groups
Pin Number
VDD
GND
14
5,11,18, 24
4
N/A 27
28 27
Description
SRC_IN/SRC_IN#
DIF(1,2,5,6)
IREF
Analog VDD & GND for PLL core
IDT® Four Output Differential Buffer for PCIe Gen 1 and Gen 2
2
ICS9DB403D REV R 11/1/12



Part Number ICS9DB403D
Description Four Output Differential Buffer
Maker IDT - IDT
Total Page 19 Pages
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