http://www.www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf



Integrated Device Technology Electronic Components Datasheet



ICS874003-02

PCI EXPRESS JITTER ATTENUATOR


No Preview Available !

ICS874003-02 pdf
PCI EXPRESS™ JITTER ATTENUATOR
www.DataSheet4U.com
ICS874003-02
GENERAL DESCRIPTION
The ICS874003-02 is a high performance Dif-
ICS ferential-to-LVDS Jitter Attenuator designed for
HiPerClockS™ use in PCI Express systems. In some PCI Express
systems, such as those found in desktop PCs, the
PCI Express clocks are generated from a low
bandwidth, high phase noise PLL frequency synthesizer. In
these systems, a jitter attenuator may be required to attenuate
high frequency random and deterministic jitter components
from the PLL synthesizer and from the system board. The
ICS874003-02 has a bandwidth of 400kHz. The 400kHz
provides an intermediate bandwidth that can easily track
triangular spread profiles, while providing good jitter
attenuation.
The ICS874003-02 uses IDT’s 3rd Generation FemtoClockTM
PLL technology to achive the lowest possible phase noise.
The device is packaged in a 20 Lead TSSOP package, making
it ideal for use in space constrained applications such as PCI
Express add-in cards.
FEATURES
Three Differential LVDS output pairs
One Differential clock input
CLK and nCLK supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
Output frequency range: 98MHz - 320MHz
Input frequency range: 98MHz - 128MHz
VCO range: 490MHz - 640MHz
Cycle-to-cycle jitter: 35ps (maximum)
Supports PCI-Express Spread-Spectrum Clocking
The 400kHz bandwidth mode allows the system designer to
make jitter attenuation/tracking skew design trade-offs
3.3V operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
OEA Pullup
F_SEL2:0 Pulldown
3
CLK Pulldown
nCLK Pullup
Phase
Detector
VCO
490 - 640MHz
F_SEL[2:0] FUNCTION TABLE
F_SEL2
0
1
0
1
0
1
0
1
Inputs
F_SEL1
0
0
1
1
0
0
1
1
F_SEL0
0
0
0
0
1
1
1
1
Outputs
QA0/nQA0, QA0/nQA0
÷2
÷5
÷4
÷2
÷2
÷5
÷4
÷4
QB0/nQB0
÷2
÷2
÷2
÷4
÷5
÷4
÷5
÷4
÷5
÷4
÷2 (default)
3
QA0
nQA0
QA1
nQA1
PIN ASSIGNMENT
QA1
VDDO
QA0
nQA0
MR
F_SEL0
nc
VDDA
F_SEL1
VDD
1
2
3
4
5
6
7
8
9
10
20 nQA1
19 VDDO
18 QB0
17 nQB0
16 F_SEL2
15 OEB
14 GND
13 nCLK
12 CLK
11 OEA
MR Pulldown
OEB Pullup
M = ÷5 (fixed)
÷5
÷4
÷2 (default)
QB0 ICS874003-02
20-Lead TSSOP
nQB0
6.5mm x 4.4mm x 0.92mm
package body
G Package
Top View
IDT/ ICSPCI EXPRESS™ JITTER ATTENUATOR
1
ICS874003AG-02 REV A AUGUST 29, 2006



No Preview Available !

ICS874003-02 pdf
ICS874003-02
PCI EXPRESS™ JITTER ATTENUATOR
www.DataSheet4U.com
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 20
QA1, nQA1 Output
Differential output pair. LVDS interface levels.
2, 19
3, 4
5
6,
9,
16
7
V
DDO
QA0, nQA0
MR
F_SEL0,
F_SEL1,
F_SEL2
nc
Power
Output
Input
Input
Output supply pins.
Pulldown
Differential output pair. LVDS interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are
reset causing the true outputs (nQx) to go low and the inverted outputs
(Qx) to go high. When logic LOW, the internal dividers and the outputs
are enabled. LVCMOS/LVTTL interface levels.
Pulldown
Frequency select pin for QAx/nQAx and QBx0/nQB0 outputs.
LVCMOS/LVTTL interface levels.
Unused
No connect.
8
VDDA
Power
Analog supply pin.
10 VDD Power
Core supply pin.
Output enable pin for QA pins. When HIGH, the QAx/nQAx outputs are
11
OEA
Input Pullup active. When LOW, the QAx/nQAx outputs are in a high impedance
state. LVCMOS/LVTTL interface levels.
12
CLK
Input Pulldown Non-inverting differential clock input.
13
nCLK
Input Pullup Inverting differential clock input.
14
15
17, 18
GND
OEB
nQB0, QB0
Power
Input
Output
Pullup
Power supply ground.
Output enable pin for QB pins. When HIGH, the QBx/nQBx outputs are
active. When LOW, the QBx/nQBx outputs are in a high impedance
state. LVCMOS/LVTTL interface levels.
Differential output pair. LVDS interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
R
PULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
TABLE 3. OUTPUT ENABLE FUNCTION TABLE
Inputs
OEA OEB
00
11
Outputs
QA0/nQA0, QA1/nQA1
HiZ
Enabled
QB0/nQB0
HiZ
Enabled
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
IDT/ ICSPCI EXPRESS™ JITTER ATTENUATOR
2
ICS874003AG-02 REV A AUGUST 29, 2006



Part Number ICS874003-02
Description PCI EXPRESS JITTER ATTENUATOR
Maker Integrated Device Technology - Integrated Device Technology
Total Page 14 Pages
PDF Download
ICS874003-02 pdf
Download PDF File
ICS874003-02 pdf
View for Mobile




Featured Datasheets

Part Number Description Manufacturers PDF
ICS874003-02 PCI EXPRESS JITTER ATTENUATOR ICS874003-02
Integrated Device Technology
PDF
ICS874003-04 PCI EXPRESS Jitter Attenuator ICS874003-04
Integrated Device Technology
PDF
ICS874003-05 PCI EXPRESS JITTER ATTENUATOR ICS874003-05
Integrated Device Technology
PDF


Part Number Start With

0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z

site map

webmaste! click here

contact us

Buy Components