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ICS858020

LOW SKEW 1-TO-4 DIFFERENTIAL-TO-CML FANOUT BUFFER


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ICS858020www.DataSheet4U.com
LOW SKEW, 1-TO-4
DIFFERENTIAL-TO-CML FANOUT BUFFER
GENERAL DESCRIPTION
The ICS858020 is a high speed 1-to-4 Differential-
ICS to-CML Fanout Buffer and is a member of the
HiPerClockS™ HiPerClockS™family of high performance clock
solutions from ICS. The ICS858020 is optimized
for high speed and very low output skew, making
it suitable for use in demanding applications such as SONET,
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The
internally terminated differential input and VREF_AC pin allow
other differential signal families such as LVDS, LVHSTL and
CML to be easily interfaced to the input with minimal use of
external components. The ICS858020 is packaged in a small
3mm x 3mm 16-pin VFQFN package which makes it ideal for
use in space-constrained applications.
FEATURES
Four differential CML outputs
One LVPECL differential clock input
IN, nIN pair can accept the following differential input
levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: 3.2GHz
Output skew: 30ps (maximum)
Part-to-part skew: 225ps (maximum)
Additive phase jitter, RMS: <0.03ps (typical)
Propagation delay: 600ps (maximum)
Operating voltage supply range:
VCC = 2.375V to 3.63V, VEE = 0V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
IN
VT
nIN
V
REF_AC
858020AK
PIN ASSIGNMENT
Q0
nQ0
16 15 14 13
IN 1
12 Q1
VT 2
11 nQ1
VREF_AC 3
10 Q2
nIN 4
9 nQ2
5678
Q1
nQ1
ICS858020
Q2 16-Lead VFQFN
nQ2 3mm x 3mm x 0.95 package body
K Package
Top View
Q3
nQ3
1 REV. A DECEMBER 10, 2007



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ICS858020 pdf
TABLE 1. PIN DESCRIPTIONS
Number
Name
1 IN
2 VT
3 VREF_AC
4
5, 16
6, 7
8, 13
9, 10
11, 12
14, 15
nIN
VEE
nQ3, Q3
V
CC
nQ2, Q2
nQ1, Q1
nQ0, Q0
Type
Input
Input
Output
Input
Power
Output
Power
Output
Output
Output
ICS858020www.DataSheet4U.com
LOW SKEW, 1-TO-4
DIFFERENTIAL-TO-CML FANOUT BUFFER
Description
Non-inverting LVPECL differential clock input. This input internally
terminates with 50Ω to the VT pin.
Termination input.
Reference voltage for AC-coupled applications.
This output biases to VCC - 1.38V.
Inverting differential LVPECL clock input. This input internally
terminates with 50Ω to the VT pin.
Negative supply pin.
Differential output pair. CML interface levels.
Positive supply pins.
Differential output pair. CML interface levels.
Differential output pair. CML interface levels.
Differential output pair. CML interface levels.
858020AK
2 REV. A DECEMBER 10, 2007



Part Number ICS858020
Description LOW SKEW 1-TO-4 DIFFERENTIAL-TO-CML FANOUT BUFFER
Maker Integrated Device Technology - Integrated Device Technology
Total Page 14 Pages
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