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ICS853S12I

LVPECL FANOUT BUFFER


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ICS853S12I pdf
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO-
3.3V, 2.5V LVPECL FANOUT BUFFER
ICS853S12I
GENERAL DESCRIPTION
The ICS853S12I is a low skew, 1-to-12 Differential-
ICS to-3.3V, 2.5V LVPECL Fanout Buffer and a member
HiPerClockS™ of the HiPerClockS™ family of High Performance
Clock Solutions from IDT. The PCLK, nPCLK pair
accepts LVPECL, CML, and SSTL differential input
levels. The high gain differential amplifier accepts peak-to-peak
input voltages as small as 150mV, as long as the common mode
voltage is within the specified minimum and maximum range.
Guaranteed output and part-to-part skew characteristics make
the ICS853S12I ideal for those clock distribution applications
demanding well defined performance and repeatability.
FEATURES
Twelve differential 3.3V, 2.5V LVPECL outputs
PCLK, nPCLK input pair
PCLK, nPCLK pair can accept the following differential
input levels: LVPECL, CML, SSTL
Maximum output frequency: 1.5GHz
Translates any single-ended input signal to 2.5V or 3.3V
LVPECL levels with a resistor bias on nPCLK input
Additive phase jitter, RMS: 0.06ps (typical)
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 680ps (maximum)
Full 3.3V or 2.5V operating supply modes
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
BLOCK DIAGRAM
PCLK Pulldown
nPCLK Pullup/Pulldown
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q11
nQ11
Q10
nQ10
Q9
nQ9
Q8
nQ8
Q7
nQ7
Q6
nQ6
PIN ASSIGNMENT
Q11
nQ11
VEE
PCLK
nPCLK
VEE
Q0
nQ0
32 31 30 29 28 27 26 25
1 24
2 23
3 ICS853S12I 22
4 32-Lead VFQFN 21
5 5mm x 5mm x 0.925mm 20
package body
6 K Package 19
7 Top View 18
8 17
9 10 11 12 13 14 15 16
nQ7
Q7
nQ6
Q6
nQ5
Q5
nQ4
Q4
IDT/ ICSLVPECL FANOUT BUFFER
1
ICS853S12AKI REV. A MAY 21, 2008



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ICS853S12I pdf
ICS853S12I
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2 Q11, nQ11 Output
Differential output pair. LVPECL interface levels.
3, 6 V Power
EE
Negative supply pins.
4
PCLK
Input Pulldown Non-inverting differential clock input.
5
nPCLK
Input
Pullup/
Pulldown
Inverting differential clock input.
7, 8
Q0, nQ0
Output
Differential output pair. LVPECL interface levels.
9, 10
Q1, nQ1
Output
Differential output pair. LVPECL interface levels.
11, 16, 25, 30
12, 13
VCC
Q2, nQ2
Power
Output
Positive supply pins.
Differential output pair. LVPECL interface levels.
14, 15
Q3, nQ3
Output
Differential output pair. LVPECL interface levels.
17, 18
Q4, nQ4
Output
Differential output pair. LVPECL interface levels.
19, 20
Q5, nQ5
Output
Differential output pair. LVPECL interface levels..
21, 22
Q6, nQ6
Output
Differential output pair. LVPECL interface levels.
23, 24
Q7, nQ7
Output
Differential output pair. LVPECL interface levels.
28, 29
Q9, nQ9
Output
Differential output pair. LVPECL interface levels.
26, 27
Q8, nQ8
Output
Differential output pair. LVPECL interface levels.
31, 32
Q10, nQ10 Output
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
2
50
50
Maximum
Units
pF
kΩ
kΩ
TABLE 3. CLOCK INPUT FUNCTION TABLE
Inputs
PCLK
nPCLK
Outputs
Q0:Q11
nQ0:nQ11
Input to Output Mode
Polarity
0
1
LOW
HIGH
Differential to Differential
Non Inverting
1
0
HIGH
LOW
Differential to Differential
Non Inverting
0
Biased; NOTE 1
LOW
HIGH
Single Ended to Differential Non Inverting
1
Biased; NOTE 1
HIGH
LOW
Single Ended to Differential Non Inverting
Biased; NOTE 1
0
HIGH
LOW
Single Ended to Differential
Inverting
Biased; NOTE 1
1
LOW
HIGH
Single Ended to Differential
Inverting
NOTE 1: Please refer to the Application Information "Wiring the Differential Input to Accept Single Ended Levels".
IDT/ ICSLVPECL FANOUT BUFFER 2 ICS853S12AKI REV. A MAY 21, 2008



Part Number ICS853S12I
Description LVPECL FANOUT BUFFER
Maker IDT - IDT
Total Page 17 Pages
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