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Integrated Device Technology Electronic Components Datasheet



ICS853S006I

LVPECL/ECL Fanout Buffer



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ICS853S006I pdf
Low Skew, 1-to-6, Differential-to-
2.5V, 3.3V LVPECL/ECL Fanout Buffer
ICS853S006I
DATA SHEET
General Description
The ICS853S006I is a low skew, high performance 1-to-6
Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The
ICS853S006I is characterized to operate from either a 2.5V or a
3.3V power supply. Guaranteed output and part-to-part skew
characteristics make the ICS853S006I ideal for those clock
distribution applications demanding well defined performance and
repeatability.
Features
Six differential 2.5V, 3.3V LVPECL/ECL outputs
One differential PCLK, nPCLK input pair
PCLK, nPCLK pair can accept the following
differential input levels: LVPECL, LVDS, CML
Maximum output frequency: 2GHz
Output skew: 50ps (max)
Part-to-part skew: 230ps (max)
Propagation delay: 550ps (max)
LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.465V, VEE = 0V
ECL mode operating voltage supply range:
VCC = 0V, VEE = -2.375V to -3.465V
-40°C to 85°C ambient operating temperature
Available lead-free (RoHS 6) package
Block Diagram
PCLK Pulldown
nPCLK Pullup/Pulldown
VBB
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Pin Assignment
VCC
nQ0
Q0
nQ1
Q1
nQ2
Q2
VCC
PCLK
nPCLK
1
2
3
4
5
6
7
8
9
10
20 VCC
19 Q5
18 nQ5
17 Q4
16 nQ4
15 Q3
14 nQ3
13 VCC
12 VEE
11 VBB
ICS853S006I
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm package body
G Package
Top View
ICS853S006AGI REVISION A NOVEMBER 15, 2011
1
©2011 Integrated Device Technology, Inc.



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ICS853S006I pdf
ICS853S006I Data Sheet
LOW SKEW, 1-TO-6, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
Table 1. Pin Descriptions
Number
1, 8, 13, 20
2, 3
4, 5
6, 7
9
10
11
12
14, 15
16, 17
18, 19
Name
VCC
nQ0, Q0
nQ1, Q1
nQ2, Q2
PCLK
nPCLK
VBB
VEE
nQ3, Q3
nQ4, Q4
nQ5, Q5
Type
Power
Output
Output
Output
Input
Input
Output
Power
Pulldown
Pullup/
Pulldown
Output
Output
Output
Description
Positive supply pin.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Non-inverting differential LVPECL clock input.
Inverting differential LVPECL clock input. VCC/2 default when left floating.
Bias voltage.
Negative supply pin.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
RPULLDOWN Input Pulldown Resistor
RVCC/2
Pullup/Pulldown Resistors
Test Conditions
Minimum
Typical
75
50
Maximum
Units
kΩ
kΩ
ICS853S006AGI REVISION A NOVEMBER 15, 2011
2
©2011 Integrated Device Technology, Inc.



Part Number ICS853S006I
Description LVPECL/ECL Fanout Buffer
Maker IDT - IDT
Total Page 19 Pages
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