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Integrated Device Technology Electronic Components Datasheet



ICS853052

DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL LVPECL MULTIPLEXER



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ICS853052 pdf
PRELIMINARY
DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL
2.5V, 3.3V, 5V LVPECL MULTIPLEXER
ICS853052
GENERAL DESCRIPTION
ICS
The ICS853052 is a Dual LVCMOS / LVTTL-to-
Differential 2.5V, 3.3V, 5V LVPECL Multiplexer and
HiPerClockS™ a member of the HiPerClocks™ family of High
Perfor mance Clocks Solutions from IDT. The
ICS853052 has two selectable single ended clock
inputs. The single ended clock input accepts LVCMOS or LVTTL
input levels and translates them to 2.5V, 3.3V or 5V LVPECL
levels. The small outline 8-pin TSSOP or 8-pin SOIC packages
make this device ideal for applications where space, high
performance and low power are important.
FEATURES
One differential 2.5V, 3.3V or 5V LVPECL output
Two selectable LVCMOS/LVTTL clock inputs
Output frequency: TBD
Additive phase jitter, RMS: 0.06ps (typical)
Propagation Delay: 370ps (typical)
2.5V, 3.3V or 5V operating supply voltage
(operating range 2.375V to 5.5V)
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
Da Pulldown
1
Db Pulldown
0
SEL Pulldown
Q
nQ
PIN ASSIGNMENT
nc 1
Da 2
Db 3
SEL 4
8 VCC
7Q
6 nQ
5 VEE
ICS853052
8-Lead TSSOP, 118 mil
3mm x 3mm x 0.95mm package body
G Package
Top View
8-Lead SOIC, 150 mil
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT/ ICS2.5V, 3.3V, 5V LVPECL MULTIPLEXER
1
ICS853052AG REV. B JANUARY 16, 2008



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ICS853052 pdf
ICS853052
DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL 2.5V, 3.3V, 5V LVPECL MULTIPLEXER
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1 nc Unused
No connect.
2, 3
Da, Db
Input Pulldown LVCMOS / LVTTL clock inputs.
Select input pin. When HIGH, selects Da input clock.
4 SEL Input Pulldown When Low selects Db input clock.
Single-ended 100H LVPECL interface levels.
5 VEE Power
6, 7
nQ, Q
Output
Negative supply pin.
Differential output pair. LVPECL interface levels.
8 VCC Power
Positive supply pin.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C
IN
RPULLDOWN
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
1
75
Maximum
Units
pF
k
TABLE 3. CONTROL INPUT FUNCTION TABLE
Inputs
SEL Selected Source
0 Db
1 Da
IDT/ ICS2.5V, 3.3V, 5V LVPECL MULTIPLEXER
2
ICS853052AG REV. B JANUARY 16, 2008



Part Number ICS853052
Description DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL LVPECL MULTIPLEXER
Maker IDT - IDT
Total Page 14 Pages
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