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ICS843S104I-133

Crystal-to-LVPECL 133MHz Clock Synthesizer



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ICS843S104I-133 pdf
Crystal-to-LVPECL 133MHz
Clock Synthesizer
ICS843S104I-133
DATA SHEET
General Description
The ICS843S104I-133 is a PLL-based clock
ICS synthesizer specifically designed for low phase noise
HiPerClockS™ applications. This device generates a 133.33MHz
differential LVPECL clock from an input reference of
25MHz. The input reference may be derived from an
external source or by the addition of a 25MHz crystal to the on-chip
crystal oscillator. An external reference is applied to the PCLK,
nPCLK pins.The device offers spread spectrum clock output for
reduced EMI applications. An I2C bus interface is used to enable or
disable spread spectrum operation as well as to select either a down
spread value of -0.35% or -0.5%.The ICS843S104I-133 is available
in a lead-free 32-Lead VFQFN package.
Features
Four LVPECL output pairs
Crystal oscillator interface: 25MHz
Differential PCLK/nPCLK input pair
PCLK/nPCLK supports the following input types: LVPECL, CML,
SSTL
Output frequency: 133.33MHz
PCI Express (2.5 Gb/s) and Gen 2 (5 Gb/S) jitter compliant
RMS phase jitter @ 133.33MHz (12kHz – 20MHz):
1.2ps (typical)
I2C support with readback capabilities up to 400kHz
Spread Spectrum for electromagnetic interference (EMI) reduction
3.3V operating supply mode
-40°C to 85°C ambient operating temperature
Available lead-free (RoHS 6) package
Block Diagram
REF_SEL Pulldown
PCLK Pulldown
nPCLK Pullup/Pulldown
25MHz
XTAL_IN
OSC
XTAL_OUT
SDATA Pullup
SCLK Pullup
1
PLL
0
I2C
Logic
4
Q[1:4]
4
nQ[1:4]
Pin Assignment
32 31 30 29 28 27 26 25
VCC 1
24 VEE
REF_SEL 2
23 nQ3
VEE 3
22 Q3
PCLK 4
21 VCC
nPCLK 5
20 VEE
VEE 6
19 nQ4
VCCA 7
18 Q4
VEE 8
17 VCC
9 10 11 12 13 14 15 16
ICS843S104I-133
32-Lead VFQFN
5.0mm x 5.0mm x 0.925mm
package body
K Package
Top View
ICS843S104BKI-133 REVISION A JUNE 9, 2009
1
©2009 Integrated Device Technology, Inc.



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ICS843S104I-133 pdf
ICS843S104I-133 Data Sheet
CRYSTAL-TO-LVPECL 133MHZ CLOCK SYNTHESIZER
Table 1. Pin Descriptions
Number
1, 17, 21, 25,
28, 29
2
3, 6, 8, 9,
10, 20, 24, 32
4
Name
VCC
REF_SEL
VEE
PCLK
5 nPCLK
7 VCCA
11 VCC_XOSC
12, XTAL_IN,
13 XTAL_OUT
14 nc
15 SCLK
16
18,19
22, 23
26, 27
30, 31
SDATA
Q4, nQ4
Q3, nQ3
Q2, nQ2
Q1, nQ1
Type
Description
Power
Core supply pins.
Input
Pulldown
Select input for XTAL (LOW) or REF_IN (HIGH).
LVCMOS/LVTTL interface levels.
Power
Negative power supply pins.
Input
Input
Power
Power
Pulldown
Pullup/
Pulldown
Non-inverting external 25MHz differential reference input.
LVPECL input levels.
Inverting external 25MHz differential reference input. LVPECL input levels.
Analog supply for PLL.
Analog supply for crystal oscillator.
Input
Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output.
Unused
Input
I/O
Output
Output
Output
Output
Pullup
Pullup
No connect.
I2C compatible SCLK. This pin has an internal pullup resistor.
LVCMOS/LVTTL interface levels.
I2C compatible SDATA. This pin has an internal pullup resistor.
LVCMOS/LVTTL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol Parameter
CIN Input Capacitance
RPULLUP
Input Pullup Resistor
RPULLDOWN Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
ICS843S104BKI-133 REVISION A JUNE 9, 2009
2
©2009 Integrated Device Technology, Inc.



Part Number ICS843S104I-133
Description Crystal-to-LVPECL 133MHz Clock Synthesizer
Maker IDT - IDT
Total Page 24 Pages
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