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Integrated Device Technology Electronic Components Datasheet



ICS83905I

1:6 CRYSTAL INTERFACETOLVCMOS / LVTTL FANOUT BUFFER


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ICS83905I pdf
DATA SHEET
LOW SKEW, 1IC:n6itrecguCriattRedYSTAL INTERFACE-
TOLVCMOS / LSyVstTemTs,LIncF. ANOUT BUFFER
ICS83I9C0S58I3905I
LOW SKEW, 1:6 CRYSTAL INTERFACE-TO-
LVCMOS / LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
ICS
The ICS83905I is a low skew, 1-to-6 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™ HiPerClockS™family of High Performance Clock
Solutions from ICS. The low impedance
LVCMOS/LVTTL outputs are designed to drive
50W series or parallel terminated transmission lines. The ef-
fective fanout can be increased from 6 to 12 by utilizing the
ability of the outputs to drive two series terminated lines.
The ICS83905I is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply mode. Guaranteed output and part-to-part skew
characteristics along with the 1.8V output capabilities makes
the ICS83905I ideal for high performance, single ended appli-
cations that also require a limited output voltage.
FEATURES
6 LVCMOS / LVTTL outputs
Outputs able to drive 12 series terminated lines
Crystal oscillator interface
Crystal input frequency range: 10MHz to 40MHz
Output skew: 80ps (maximum)
RMS phase jitter @ 25MHz, (100Hz - 1MHz):
0.26ps (typical) (V = V = 2.5V)
DD DDO
Phase noise:
Offset
Noise Power
100Hz .............. -129.7 dBc/Hz
1kHz .............. -144.4 dBc/Hz
10kHz .............. -147.3 dBc/Hz
100kHz .............. -157.3 dBc/Hz
5V tolerant enable inputs
Synchronous output enables
Operating power supply modes:
Full 3.3V, 2.5V and 1.8V,
mixed 3.3V core/2.5V output operating supply,
mixed 3.3V core/1.8V output operating supply,
mixed 2.5V core/1.8V output operating supply
-40°C to 85°C ambient operating temperature
Lead-Free package fully RoHS compliant
BLOCK DIAGRAM
XTAL_IN
XTAL_OUT
ENABLE 1
ENABLE 2
SYNCHRONIZE
SYNCHRONIZE
PIN ASSIGNMENT
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDo
BCLK1
GND
BCLK2
1
2
3
4
5
6
7
8
16 XTAL_IN
15 ENABLE 1
14 BCLK5
1 3 VDDO
12 BCLK4
11 GND
10 BCLK3
9 VDD
ICS83905I
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm body package
G Pacakge
Top View
BCLK5
83905AGI
http://www.icst.com/products/hiperclocks.html
IDT™ / ICS™ LOW SKEW, 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTT1L FANOUT BUFFER
1
REV. B MAY 16, 2005
ICS83905I



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ICS83905I pdf
ICS83905IICS83905I
L LVSCMO,S1:/6LCVTTL F I B - -LOW SKEW,
1:6
Integrated
Circuit
CSRyYsSteTmALs,IINnTcE.RFACE-TOLVCMOS
/
LVTTL
FANOUT
OBWUFFEKREW
RYSTAL NTERFACE TOTSD
ANOUT UFFER
TABLE 1. PIN DESCRIPTIONS
Number
1
2, 15
3, 7, 11
4, 6, 8,
10, 12, 14
5, 13
9
16
Name
XTAL_OUT
ENABLE 2, ENABLE 1
GND
BCLK0, BCLK1, BCLK2,
BCLK3, BCLK4, BCLK5
VDDO
VDD
XTAL_IN
Type
Output
Input
Power
Output
Power
Power
Input
Description
Crystal oscillator interface. XTAL_OUT is the output.
Clock enable. LVCMOS / LVTTL interface levels. See Table 3.
Power supply ground.
Clock outputs. LVCMOS / LVTTL interface levels.
Output supply pin.
Core supply pin.
Crystal oscillator interface. XTAL_IN is the input.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
Parameter
Input Capacitance
CPD
Power Dissipation Capacitance
(per output)
ROUT
Output Impedance
Test Conditions
VDDO = 3.465V
VDDO = 2.625V
VDDO = 2V
VDDO = 3.3V ± 5%
VDDO = 2.5V ± 5%
VDDO = 1.8V ± 0.2V
Minimum
Typical
4
7
7
10
Maximum
19
18
16
Units
pF
pF
pF
pF
Ω
Ω
Ω
TABLE 3. OUTPUT ENABLE AND CLOCK ENABLE FUNCTION TABLE
Control Inputs
ENABLE 1 ENABLE 2
00
01
10
11
Outputs
BCLK0:BCLK4
BCLK5
LOW
LOW
LOW
Toggling
Toggling
LOW
Toggling
Toggling
BCLK5
BCLK0:4
ENABLE2
ENABLE1
FIGURE 1. ENABLE TIMING DIAGRAM
83905AGI
http://www.icst.com/products/hiperclocks.html
2
IDT™ / ICS™ LOW SKEW, 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER
2
REV. B MAY 16, 2005
ICS83905I



Part Number ICS83905I
Description 1:6 CRYSTAL INTERFACETOLVCMOS / LVTTL FANOUT BUFFER
Maker Integrated Device Technology - Integrated Device Technology
Total Page 17 Pages
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