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ICS831742I

4:2 Differential Clock/Data Multiplexer


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ICS831742I pdf
4:2 Differential Clock/Data
Multiplexer
ICS831742I
DATA SHEET
General Description
The ICS831742I is a high-performance, differential HCSL clock/data
multiplexer and fanout buffer. The device is designed for the
multiplexing and fanout of high-frequency clock and data signals. The
device has four differential, selectable clock/data inputs. The selected
input signal is distributed to two low-skew differential HCSL outputs.
Each input pair accepts HCSL, LVDS and LVPECL levels. The
ICS831742I is characterized to operate from a 3.3V power supply.
Guaranteed input, output-to-output and part-to-part skew
characteristics make the ICS831742I ideal for those clock and data
distribution applications demanding well-defined performance and
repeatability. The ICS831742I supports the clock multiplexing and
distribution of PCI Express (2.5 Gb/s), Gen 2 (5 Gb/s) and
Gen 3 (8 Gb/s) clock signals.
Features
4:2 differential clock/data multiplexer with fanout
Four selectable, differential input pairs
Each differential input pair can accept the following levels: HCSL,
LVDS and LVPECL
Two differential HCSL output pairs
Maximum input/output clock frequency: 700MHz
Maximum input/output data rate: 1400Mb/s (NRZ)
LVCMOS interface levels for all control inputs
PCI Express (2.5Gb/s), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) clock
jitter compliant
Input skew: 110ps max
Part-to-part skew: 225ps max
Full 3.3V supply voltage
Available in lead-free (RoHS 6)
-40°C to 85°C ambient operating temperature
Block Diagram
IREF
CLK0 Pulldown
nCLK0 Pullup/down
Pulldown
CLK1
nCLK1 Pullup/down
Pulldown
CLK2
nCLK2 Pullup/down
Pulldown
CLK3
nCLK3 Pullup/down
SEL1 Pulldown
SEL0 Pulldown
nOEA Pullup
nOEB Pullup
00
01
10
11
QA
nQA
QB
nQB
Pin Assignment
GND
CLK0
nCLK0
VDD
CLK1
nCLK1
CLK2
nCLK2
GND
CLK3
nCLK3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
24 SEL1
23 IREF
22 SEL0
21 VDD
20 nQB
19 QB
18 nQA
17 QA
16 VDD
15 GND
14 nOEB
13 nOEA
ICS831742AGI
24-Lead TSSOP
4.4mm x 7.8mm x 0.925mm package body
G Package
Top View
ICS831742AGI JULY 10, 2012
1 ©2012 Integrated Device Technology, Inc.



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ICS831742I pdf
ICS831742I Data Sheet
4:2 DIFFERENTIAL CLOCK/DATA MULTIPLEXER
Table 1. Pin Descriptions
Number
1, 9, 15
2
3
4, 12,
16, 21
5
6
7
8
10
11
13
Name
GND
CLK0
nCLK0
VDD
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
nOEA
Power
Input
Input
Power
Input
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown/Pullup
Description
Power supply ground.
Non-inverting clock/data input.
Inverting differential clock/data input. VDD/2 default when left floating.
Positive power supply.
Pulldown
Pulldown/Pullup
Pulldown
Pulldown/Pullup
Pulldown
Pulldown/Pullup
Pullup
Non-inverting clock/data input.
Inverting differential clock/data input. VDD/2 default when left floating.
Non-inverting clock/data input.
Inverting differential clock/data input. VDD/2 default when left floating.
Non-inverting clock/data input.
Inverting differential clock/data input. VDD/2 default when left floating.
Output enable for the QA output. See Table 3A for function.
LVCMOS/LVTTL interface levels.
14
17, 18
19, 20
nOEB
QA, nQA
QB, nQB
Input
Output
Output
Pullup
Output enable for the QB output. See Table 3B for function.
LVCMOS/LVTTL interface levels.
Differential output pair. HCSL interface levels.
Differential output pair. HCSL interface levels.
22, 24 SEL0, SEL1 Input
23
IREF
Input
Pulldown
Differential clock/data Input select. See Table 3C for function.
LVCMOS/LVTTL interface levels.
An external fixed precision resistor (475) from this pin to ground provides a
reference current used for the differential current-mode QX, nQX outputs.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
CIN
RPULLUP
RPULLDOWN
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
ICS831742AGI JULY 10, 2012
2 ©2012 Integrated Device Technology, Inc.



Part Number ICS831742I
Description 4:2 Differential Clock/Data Multiplexer
Maker Integrated Device Technology - Integrated Device Technology
Total Page 18 Pages
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