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E0C6266

4-bit Single Chip Microcomputer



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E0C6266 pdf
PF428-10
E0C6266
4-bit Single Chip Microcomputer
WOPidpreeorVdauoticlotatnsge
q Core CPU Architecture
q 38.4kHz/500kHz Twin Clock Operation
q Built-in, 2-ch. Serial Ports
q SVD Circuit/2-ch. Analog Comparators
s DESCRIPTION
The E0C6266 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 CMOS 4-bit
core CPU. It also contains the ROM, RAM, 2-channel timer, event counter, start-stop serial ports, clock sync
serial ports and 40 I/O ports.
The E0C6266 provides an excellent solution for low-power consumption systems with clock functions.
s FEATURES
q CMOS LSI 4-bit parallel processing
q Clock ..................................................... 38.4kHz (Typ.)/500kHz (Max.) (selectable by software)
q Instruction set ........................................ 108 instructions
q Instruction cycle time ............................ 130µsec, 182µsec or 312µsec at 38kHz
(depending on instruction)
10µsec, 14µsec or 24µsec at 500kHz
(depending on instruction)
q ROM capacity ....................................... 6,144 × 12 bits
q RAM capacity ........................................ 1,024 × 4 bits
q Input port ............................................... 12 bits
q Output port ............................................ 16 bits
q I/O port .................................................. 12 bits
q Serial I/O port ........................................ 2 ports
Async; half-duplex, start-stop; transmission speed at 200, 300, 600, 1200, 2400 or 4800 bps;
6 to 8-bit data length; built-in error detect circuit and built-in send/receive buffer register.
Clock sync.; operating by external clock; start-stop can be set by mask option.
q Built-in time base counter, programmable timer, event counter, and watchdog timer
q Built-in SVD circuit, 2 channels (internal voltage detection)
q Built-in comparator, 2 channels
q Built-in LCD drive power supply, double boosting, external adjustment of output voltage
q Interrupts ............................................... External : Input interrupt
Internal : Timer interrupt
Comparator interrupt
Event counter interrupt
Serial I/O interrupt
3 lines
2 lines (4ch.)
2 lines
1 line
2 lines
q Supply voltage ...................................... 2.2V to 5.5V
q Current consumption ............................ HALT mode (38.4kHz)
: 1.8µA (Typ.)
OPERATING mode (500kHz) : 110µA (Typ.)/150µA (Max.)
q Package ................................................ QFP6-60pin (plastic)
Die form
SEIKO EPSON CORPORATION
1



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E0C6266
s BLOCK DIAGRAM
ROM
6,144 words x 12 bits
OSC
System Reset
Control
Core CPU E0C6200
K20~21
R30~31
K22~23
R32~33
VDD
VL1~4
CA~CE
VADJ
VS1
VSS
VSS2
P10~13
K10
RAM
1,024 words x 4 bits
Serial Port 1
Serial Port 2
Power
Controller
AMP & SVD
Interrupt
Generator
Input Port
Test Port
I/O Port
Output Port
Time Base
Counter
Programmable
Timer
Event
Counter
K00~03, K10~13, K20~23
TEST
P00~03, P10~13, P20~23
R00~03, R10~13, R20~23, R30~33
K13
2



Part Number E0C6266
Description 4-bit Single Chip Microcomputer
Maker Epson - Epson
Total Page 7 Pages
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