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Cypress Semiconductor Electronic Components Datasheet



CY2300

Phase-Aligned Clock Multiplier



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CY2300 pdf
CY2300
Phase-Aligned Clock Multiplier
Phase-Aligned Clock Multiplier
Features
10 MHz to 166.67 MHz output operating range
Four-multiplier configuration
Single PLL architecture
Phase aligned outputs
Low jitter, high accuracy outputs
Output enable pin
3.3 V operation
5 V tolerant input
Internal loop filter
8-pin 150-mil small-outline integrated circuit (SOIC) package
Commercial temperature
Functional Description
The CY2300 is a four output 3.3 V phase-aligned system clock
designed to distribute high-speed clocks in PC, workstation,
datacom, telecom, and other high-performance applications.
The part allows the user to obtain 1/2x, 1x, 1x and 2x REFIN
output frequencies on respective output pins.
The part has an on-chip PLL which locks to an input clock
presented on the REFIN pin. The input-to-output skew is
guaranteed to be less than 200 ps, and output-to-output skew
is guaranteed to be less than 200 ps.
Multiple CY2300 devices can accept the same input clock and
distribute it in a system. In this case, the skew between the
outputs of two devices is guaranteed to be less than 400 ps.
The CY2300 is available in commercial temperature range.
For a complete list of related documentation, click here.
Logic Block Diagram
FBK
REFIN
/2
PLL
OE
Divider
Logic
1/2xREF
REF
REF
2xREF
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-07252 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised December 5, 2016



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CY2300 pdf
CY2300
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Maximum Ratings ............................................................. 4
Operating Conditions ....................................................... 4
Electrical Characteristics ................................................. 4
Thermal Resistance .......................................................... 4
Test Circuits ...................................................................... 5
Switching Characteristics ................................................ 5
Switching Waveforms ...................................................... 6
Ordering Information ........................................................ 7
Ordering Code Definitions ........................................... 7
Package Drawing and Dimensions ................................. 8
Reference Documents ...................................................... 9
Acronyms .......................................................................... 9
Document Conventions ................................................... 9
Units of Measure ......................................................... 9
Errata ............................................................................... 10
Part Numbers Affected .............................................. 10
CY2300 Errata Summary .......................................... 10
CY2300 Qualification Status of fixed silicon .............. 10
Document History Page ................................................. 12
Sales, Solutions, and Legal Information ...................... 13
Worldwide Sales and Design Support ....................... 13
Products .................................................................... 13
PSoC®Solutions ....................................................... 13
Cypress Developer Community ................................. 13
Technical Support ..................................................... 13
Document Number: 38-07252 Rev. *I
Page 2 of 13



Part Number CY2300
Description Phase-Aligned Clock Multiplier
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 13 Pages
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