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Cypress Semiconductor Electronic Components Datasheet



CY2254A

Pentium Processor Compatible Clock Synthesizer/Driver



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CY2254A
Pentium® Processor Compatible
Clock Synthesizer/Driver
Features
• Multiple clock outputs to meet requirements of most
Pentium® motherboards
Four pin-selectable CPU clocks @ 66.66 MHz, 60.0
MHz, and 50.0 MHz for support of Intel TritonPCIset
based PC
55.0 MHz pin-selectable CPU clock also available (2
option only)
Six PCI clocks at 1/2 CPU Clock frequency
One I/O clock @ 24 MHz
One Keyboard Controller clock @ 12 MHz (1 option)
or one Universal Serial Bus clock @ 48 MHz
(2 option)
Two Ref. clocks @ 14.318 MHz
Ref. 14.318 MHz Xtal oscillator input
CPU clock jitter < 200 ps cycle-to-cycle
Low skew outputs
< 250 ps between CPU clocks
< 250 ps between PCI clocks
< 500 ps between CPU and PCI clocks (2 option)
CPU clock leads PCI clock by +1 ns min. to +4 ns
max. (1 option)
Freq. stability = 0.01% (max.)
Output duty cycle 45% min. to 55% max.
Test mode support (1 option only)
3.3V or 5.0V operation
Internal pull-up resistors on S0, S1, and OE inputs
Functional Description
The CY2254A is a Clock Synthesizer/Driver that provides the
multiple clocks required for a Pentium-based PC. The
CY2254A has low-skew outputs (< 250 ps between the CPU
Clocks, < 250 ps between the PCI Clocks). In addition, the
CY2254A CPU clock outputs have less than 200 ps cy-
cle-to-cycle jitter. Finally, both the PCI and CPU clock outputs
meet the 1 V/ns slew rate requirement of a Pentium proces-
sor-based system.
The CY2254A accepts a 14.318 MHz reference signal as its
input. The CY2254A has 2 PLLs, one of which generates the
CPU and PCI clocks, and the other generates the I/O and Key-
board Controller or USB clocks. The CY2254A runs off either
a 3.3V or 5V supply.
The CY2254A is available in two options. The 1 option sup-
ports the Intel Triton PCIset and provides a 12 MHz keyboard
clock on pin 25. The 2 option provides a 48 MHz USB clock
on pin 25 and supports the Cyrix® M1 processor.
Logic Block Diagram
XTALIN
XTALOUT
14.318
MHz
OSC.
S0
S1
SYS
PLL
÷2 ÷2
CPU
PLL
ROM
÷2
1 option only DELAY
OE
REF0 (14.318 MHz)
REF1 (14.318 MHz)
KBDCLK (12 MHz)
IOCLK (24 MHz)
USBCLK (48 MHz)
CPUCLK0
CPUCLK1
CPUCLK2
CPUCLK3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
Pin Configuration
Top View
SOIC
VDD
XTALIN
XTALOUT
VSS
OE
CPUCLK0
CPUCLK1
VDD
CPUCLK2
CPUCLK3
VSS
S1
S0
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 REF0
27 REF1
26 VDD
25 SEEBELOW
24 IOCLK
23 VSS
22 PCICLK2
21 PCICLK3
20 VDD
19 PCICLK4
18 PCICLK5
17 VSS
16 PCICLK1
15 PCICLK0
OPTION
1
2
PIN 25
KBDCLK
12 MHz
USBCLK
48 MHz
Intel and Pentium are registered trademarks of Intel Corporation.
Triton is a trademark of Intel Corporation.
Cyrix is a registered trademark of Cyrix Corporation.
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600
Document #: 38-07203 Rev. *A
Revised December 14, 2002



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CY2254A
Pin Summary
Name
VDD
XTALIN[1]
XTALOUT[1]
VSS
OE
CPUCLK0
CPUCLK1
VDD
CPUCLK2
CPUCLK3
VSS
S1
S0
VDD
PCICLK0
PCICLK1
VSS
PCICLK5
PCICLK4
VDD
PCICLK3
PCICLK2
VSS
IOCLK
KBDCLK
USBCLK
VDD
REF1
REF0
1 2 Description
1 1 Voltage supply
2 2 Reference crystal input
3 3 Reference crystal feedback
4 4 Ground
5 5 Output Enable, Active HIGH (internal pull-up resistor to VDD)
6 6 CPU clock output
7 7 CPU clock output
8 8 Voltage supply
9 9 CPU clock output
10 10 CPU clock output
11 11 Ground
12 12 CPU clock select input, bit 1 (internal pull-up resistor to VDD)
13 13 CPU clock select input, bit 0 (internal pull-up resistor to VDD)
14 14 Voltage supply
15 15 PCI clock output
16 16 PCI clock output
17 17 Ground
18 18 PCI clock output
19 19 PCI clock output
20 20 Voltage supply
21 21 PCI clock output
22 22 PCI clock output
23 23 Ground
24 24 I/O clock output (24 MHz)
25 Keyboard controller clock output (12 MHz)
25 Universal Serial Bus clock output (48 MHz)
26 26 Voltage supply
27 27 Reference clock output (14.318 MHz)
28 28 Reference clock output (14.318 MHz)
Function Table
Option OE S0 S1 XTALIN CPUCLK PCICLK
1,2
0 X X 14.318 MHz High-Z
High-Z
1,2
1 0 0 14.318 MHz 50.0 MHz 25.0 MHz
1,2
1 0 1 14.318 MHz 60.0 MHz 30.0 MHz
1,2
1
1 1 0 14.318 MHz 66.66 MHz 33.33 MHz
1 1 1 TCLK[2]
TCLK/2
TCLK/4
2 1 1 1 14.318 MHz 55.0 MHz 27.5 MHz
Notes:
1. For best accuracy, use a parallel-resonant crystal, CLOAD = 17 pF.
2. TCLK is a test clock on XTALIN (pin 2) during test mode.
Ref. Clock
Output
IOCLK
High-Z
High-Z
14.318 MHz 24 MHz
14.318 MHz 24 MHz
14.318 MHz 24 MHz
TCLK
TCLK/4
14.318 MHz 24 MHz
KBDCLK
1 only
High-Z
12 MHz
12 MHz
12 MHz
TCLK/8
USBCLK
2 only
High-Z
48 MHz
48 MHz
48 MHz
48 MHz
Document #: 38-07203 Rev. *A
Page 2 of 8



Part Number CY2254A
Description Pentium Processor Compatible Clock Synthesizer/Driver
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 8 Pages
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