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Cypress Semiconductor Electronic Components Datasheet



CY14B108N

8-Mbit (1024 K x 8/512 K x 16) nvSRAM



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CY14B108N pdf
CY14B108L
CY14B108N
8-Mbit (1024 K × 8/512 K × 16) nvSRAM
8-Mbit (1024 K × 8/512 K × 16) nvSRAM
Features
20 ns, 25 ns, and 45 ns access times
Internally organized as 1024 K × 8 (CY14B108L) or 512 K ×16
(CY14B108N)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap nonvolatile elements initiated by
software, device pin, or AutoStore on power-down
RECALL to SRAM initiated by software or power-up
Infinite Read, Write, and RECALL cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Single 3 V +20, –10operation
Industrial temperature
Packages
44-/54-pin thin small outline package (TSOP) Type II
48-ball fine-pitch ball grid array (FBGA)
Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B108L/CY14B108N is a fast static RAM
(SRAM), with a nonvolatile element in each memory cell. The
memory is organized as 1024 Kbytes of 8 bits each or 512 K
words of 16 bits each. The embedded nonvolatile elements
incorporate QuantumTrap technology, producing the world’s
most reliable nonvolatile memory. The SRAM provides infinite
read and write cycles, while independent nonvolatile data
resides in the highly reliable QuantumTrap cell. Data transfers
from the SRAM to the nonvolatile elements (the STORE
operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
Logic Block Diagram [1, 2, 3]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A17
A18
A19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Quatrum Trap
2048 X 2048 X 2
R
O STORE
W
RECALL
D
E STATIC RAM
C ARRAY
O 2048 X 2048 X 2
D
E
R
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A9 A10 A11 A12 A13 A14 A15 A16
VCC
VCAP
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
HSB
A14 - A2
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A19 for × 8 configuration and Address A0–A18 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
wwwD.DocautamSheenett4#U: .0n0et1-45523 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 13, 2011
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CY14B108N pdf
CY14B108L
CY14B108N
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 4
Device Operation .............................................................. 5
SRAM Read ....................................................................... 5
SRAM Write ....................................................................... 5
AutoStore Operation ........................................................ 5
Hardware STORE Operation ............................................ 5
Hardware RECALL (Power-Up) ....................................... 6
Software STORE ............................................................... 6
Software RECALL ............................................................. 6
Preventing AutoStore ....................................................... 8
Data Protection ................................................................. 8
Noise Considerations ....................................................... 8
Best Practices ................................................................... 8
Maximum Ratings ............................................................. 9
Operating Range ............................................................... 9
DC Electrical Characteristics .......................................... 9
Data Retention and Endurance ..................................... 10
Capacitance .................................................................... 10
Thermal Resistance ........................................................ 10
AC Test Loads ................................................................ 10
AC Test Conditions ........................................................ 10
AC Switching Characteristics ....................................... 11
Switching Waveforms .................................................... 11
AutoStore/Power-Up RECALL ....................................... 14
Switching Waveforms .................................................... 14
Software Controlled STORE/RECALL Cycle ................ 15
Switching Waveforms .................................................... 15
Hardware STORE Cycle ................................................. 16
Switching Waveforms .................................................... 16
Truth Table For SRAM Operations ................................ 17
Ordering Information ...................................................... 18
Ordering Code Definitions ......................................... 18
Package Diagrams .......................................................... 19
Acronyms ........................................................................ 22
Document Conventions ................................................. 22
Units of Measure ....................................................... 22
Document History Page ................................................. 23
Sales, Solutions, and Legal Information ...................... 25
Worldwide Sales and Design Support ....................... 25
Products .................................................................... 25
PSoC Solutions ......................................................... 25
Document #: 001-45523 Rev. *J
Page 2 of 25
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Part Number CY14B108N
Description 8-Mbit (1024 K x 8/512 K x 16) nvSRAM
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 25 Pages
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