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Cypress Semiconductor Electronic Components Datasheet



CY14B108K

8-Mbit (1024 K x 8/512 K x 16) nvSRAM



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CY14B108K pdf
CY14B108K, CY14B108M
8-Mbit (1024 K × 8/512 K × 16) nvSRAM
with Real Time Clock
8-Mbit (1024 K × 8/512 K × 16) nvSRAM with Real Time Clock
Features
25 ns and 45 ns access times
Internally organized as 1024 K × 8 (CY14B108K) or 512 K × 16
(CY14B108M)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap nonvolatile elements is initiated by
software, device pin, or AutoStore on power-down
RECALL to SRAM initiated by software or power-up
High reliability
Infinite Read, Write, and RECALL cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Single 3 V +20%, –10% operation
Data integrity of Cypress nonvolatile static RAM (nvSRAM)
combined with full-featured real time clock (RTC)
Watchdog timer
Clock alarm with programmable interrupts
Capacitor or battery backup for RTC
Industrial temperature
44 and 54-pin thin small outline package (TSOP) Type II
Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B108K/CY14B108M combines a 8-Mbit
nonvolatile static RAM (nvSRAM) with a full featured RTC in a
monolithic integrated circuit. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM is read and
written infinite number of times, while independent nonvolatile
data resides in the nonvolatile elements.
The RTC function provides an accurate clock with leap year
tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
Cypress Semiconductor Corporation • 198 Champion Court
wwwD.DocautamSheenett4#U: .0n0et1-47378 Rev. *G
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 13, 2011
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CY14B108K pdf
CY14B108K, CY14B108M
Logic Block Diagram [1, 2, 3]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A17
A18
A 19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Quatrum
Trap
2048 X 2048 X 2
R
O STORE
W RECALL
D
E STATIC RAM
C ARRAY
O 2048 X 2048 X 2
D
E
R
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A9 A10 A11 A12 A13 A14 A15 A16
VCC VCAP
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
VRTCbat
VRTCcap
HSB
A14 - A2
RTC
MUX
Xout
Xin
INT
A19- A0
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A19 for × 8 configuration and Address A0–A18 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Document #: 001-47378 Rev. *G
Page 2 of 33
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Part Number CY14B108K
Description 8-Mbit (1024 K x 8/512 K x 16) nvSRAM
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 33 Pages
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