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Cypress Semiconductor Electronic Components Datasheet



CY14B101MA

1-Mbit (128K x 8/64K x 16) nvSRAM



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CY14B101MA pdf
CY14B101KA
CY14B101MA
1-Mbit (128K × 8/64K × 16) nvSRAM with
Real Time Clock
1-Mbit (128K × 8/64K × 16) nvSRAM with Real Time Clock
Features
1-Mbit nonvolatile static random access memory (nvSRAM)
25 ns and 45 ns access times
Internally organized as 128K × 8 (CY14B101KA) or 64K × 16
(CY14B101MA)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap nonvolatile elements is initiated by
software, hardware, or AutoStore on power-down
RECALL to SRAM initiated on power-up or by software
High reliability
Infinite Read, Write, and RECALL cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Real time clock (RTC)
Full featured real time clock
Watchdog timer
Clock alarm with programmable interrupts
Capacitor or battery backup for RTC
Backup current of 0.35 µA (Typ)
Industry standard configurations
Single 3 V +20%, –10% operation
Industrial temperature
Packages
44-/54-pin thin small outline package (TSOP) Type II
48-pin shrink small outline package (SSOP)
Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B101KA/CY14B101MA combines a 1-Mbit
nvSRAM with a full featured real time clock in a monolithic
integrated circuit. The embedded nonvolatile elements
incorporate QuantumTrap technology producing the world’s
most reliable nonvolatile memory. The SRAM is read and written
an infinite number of times, while independent nonvolatile data
resides in the nonvolatile elements.
The real time clock function provides an accurate clock with leap
year tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
For a complete list of related documentation, click here.
Logic Block Diagram[1, 2, 3]
A5
A6
A7
A8
A9
A12
A13
A14
A15
A16
R
O
W
D
E
C
O
D
E
R
Quatrum
Trap
1024 X 1024
STORE
RECALL
STATIC RAM
ARRAY
1024 X 1024
VCC
VCA
P
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
VRTCbat
VRTCcap
HSB
A14 - A2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A0 A1 A2 A3 A4 A10 A11
RTC
MUX
Xout
Xin
INT
A16- A0
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A16 for × 8 configuration and Address A0–A15 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-42880 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised February 22, 2016



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CY14B101MA pdf
CY14B101KA
CY14B101MA
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 4
Device Operation .............................................................. 5
SRAM Read ................................................................ 5
SRAM Write ................................................................. 5
AutoStore Operation .................................................... 5
Hardware STORE (HSB) Operation ............................ 5
Hardware RECALL (Power-Up) .................................. 6
Software STORE ......................................................... 6
Software RECALL ....................................................... 6
Preventing AutoStore .................................................. 8
Data Protection ............................................................ 8
Real Time Clock Operation .............................................. 8
nvTIME Operation ....................................................... 8
Clock Operations ......................................................... 8
Reading the Clock ....................................................... 8
Setting the Clock ......................................................... 8
Backup Power ............................................................. 8
Stopping and Starting the Oscillator ............................ 9
Calibrating the Clock ................................................... 9
Alarm ........................................................................... 9
Watchdog Timer ........................................................ 10
Power Monitor ........................................................... 10
Interrupts ................................................................... 10
Flags Register ........................................................... 11
RTC External Components ....................................... 12
PCB Design Considerations for RTC ............................ 13
Layout requirements .................................................. 13
Maximum Ratings ........................................................... 18
Operating Range ............................................................. 18
DC Electrical Characteristics ........................................ 18
Data Retention and Endurance ..................................... 19
Capacitance .................................................................... 19
Thermal Resistance ........................................................ 19
AC Test Loads ................................................................ 20
AC Test Conditions ........................................................ 20
RTC Characteristics ....................................................... 20
AC Switching Characteristics ....................................... 21
SRAM Read Cycle .................................................... 21
SRAM Write Cycle ..................................................... 21
Switching Waveforms .................................................... 22
AutoStore/Power-Up RECALL ....................................... 25
Switching Waveforms .................................................... 25
Software Controlled STORE/RECALL Cycle ................ 26
Switching Waveforms .................................................... 26
Hardware STORE Cycle ................................................. 27
Switching Waveforms .................................................... 27
Truth Table for SRAM Operations ................................. 28
Truth Table for SRAM Operations ................................. 28
HSB must remain HIGH for SRAM operations. ............ 28
Ordering Information ...................................................... 29
Package Diagrams .......................................................... 30
Acronyms ........................................................................ 33
Document Conventions ................................................. 33
Units of Measure ....................................................... 33
Document History Page ................................................. 34
Sales, Solutions, and Legal Information ...................... 37
Worldwide Sales and Design Support ....................... 37
Products .................................................................... 37
PSoC® Solutions ...................................................... 37
Cypress Developer Community ................................. 37
Technical Support ..................................................... 37
Document Number: 001-42880 Rev. *O
Page 2 of 37



Part Number CY14B101MA
Description 1-Mbit (128K x 8/64K x 16) nvSRAM
Maker Cypress Semiconductor - Cypress Semiconductor
Total Page 30 Pages
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