16-Bit 100 kSPS
On-Chip Sample-Hold Function
Parallel Output Format
16 Bits No Missing Codes
؎1 LSB INL
–97 dB THD
90 dB S/(N+D)
1 MHz Full Power Bandwidth
FUNCTIONAL BLOCK DIAGRAM
AGND SENSE 14
LOGIC & TIMING
The AD676 is a multipurpose 16-bit parallel output analog-to-
digital converter which utilizes a switched-capacitor/charge
redistribution architecture to achieve a 100 kSPS conversion
rate (10 µs total conversion time). Overall performance is opti-
mized by digitally correcting internal nonlinearities through
The AD676 circuitry is segmented onto two monolithic chips—
a digital control chip fabricated on Analog Devices DSP CMOS
process and an analog ADC chip fabricated on our BiMOS II
process. Both chips are contained in a single package.
The AD676 is specified for ac (or “dynamic”) parameters such
as S/(N+D) Ratio, THD and IMD which are important in sig-
nal processing applications. In addition, dc parameters are
specified which are important in measurement applications.
T BIT 1 – BIT 16
The AD676 operates from +5 V and ± 12 V supplies and typi-
cally consumes 360 mW during conversion. The digital supply
(VDD) is separated from the analog supplies (VCC, VEE) for re-
duced digital crosstalk. An analog ground sense is provided for
the analog input. Separate analog and digital grounds are also
The AD676 is available in a 28-pin plastic DIP or 28-pin side-
brazed ceramic package. A serial-output version, the AD677, is
available in a 16-pin 300 mil wide ceramic or plastic package.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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