14-Bit, 80 MSPS/105 MSPS
SNR = 75 dB, fIN 15 MHz, up to 105 MSPS
SNR = 72 dB, fIN 200 MHz, up to 105 MSPS
SFDR = 89 dBc, fIN 70 MHz, up to 105 MSPS
100 dBFS multitone SFDR
IF sampling to 200 MHz
Sampling jitter: 0.1 ps
1.5 W power dissipation
Differential analog inputs
Pin compatible to AD6644
Twos complement digital output format
3.3 V CMOS compatible
Data-ready for output latching
Multichannel, multimode receivers
Base station infrastructures
AMPS, IS-136, CDMA, GSM, W-CDMA
Single channel digital receivers
Antenna array processing
Radars, infrared imaging
The AD6645 is a high speed, high performance, monolithic 14-bit
analog-to-digital converter (ADC). All necessary functions,
including track-and-hold (T/H) and reference, are included on the
chip to provide a complete conversion solution. The AD6645
provides CMOS-compatible digital outputs. It is the fourth
generation in a wideband ADC family, preceded by the AD9042
(12-bit, 41 MSPS), the AD6640 (12-bit, 65 MSPS, IF sampling),
and the AD6644 (14-bit, 40 MSPS/65 MSPS).
Designed for multichannel, multimode receivers, the AD6645 is
part of the Analog Devices, Inc., SoftCell® transceiver chipset.
The AD6645 maintains 100 dB multitone, spurious-free dynamic
range (SFDR) through the second Nyquist band. This breakthrough
performance eases the burden placed on multimode digital
receivers (software radios) that are typically limited by the ADC.
Noise performance is exceptional; typical signal-to-noise ratio
(SNR) is 74.5 dB through the first Nyquist band.
The AD6645 is built on the Analog Devices extra fast
complementary bipolar (XFCB) process and uses an innovative,
multipass circuit architecture. Units are available in thermally
enhanced 52-lead PowerQuad 4 (LQFP_PQ4) and 52-lead
exposed pad (TQFP_EP) packages specified from −40°C to
+85°C at 80 MSPS and −10°C to +85°C at 105 MSPS.
1. IF Sampling. The AD6645 maintains outstanding ac
performance up to input frequencies of 200 MHz, suitable
for multicarrier 3G wideband cellular IF sampling receivers.
2. Pin Compatibility. The ADC has the same footprint and
pin layout as the AD6644 14-bit, 40 MSPS/65 MSPS ADC.
3. SFDR Performance and Oversampling. Multitone SFDR
performance of 100 dBFS can reduce the requirements of
high end RF components and allows the use of receive
signal processors, such as the AD6620, AD6624/AD6624A,
FUNCTIONAL BLOCK DIAGRAM
DIGITAL ERROR CORRECTION LOGIC
DMID OVR DRY D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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