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Analog Devices Semiconductor Electronic Components Datasheet



AD647

Ultralow Drift/ Dual BiFET Op Amp



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AD647 pdf
a
FEATURES
Low Offset Voltage Drift
Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Currents
Crosstalk: –124 dB at 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 250 V max
Low Input Voltage Noise: 2 V p-p
High Open Loop Gain: 108 dB
Low Quiescent Current: 2.8 mA max
Low Total Harmonic Distortion
Standard Dual Amplifier Pinout
Available in Hermetic Metal Can Package, Hermetic
Surface Mount (20-Pin LCC) and Chip Form
MIL-STD-883B Processing Also Available
Single Version Available: AD547
Ultralow Drift,
Dual BiFET Op Amp
AD647
PRODUCT DESCRIPTION
The AD647 is an ultralow drift, dual JFET amplifier that com-
bines high performance and convenience in a single package.
The AD647 uses the most advanced ion-implantation and laser
wafer drift trimming technologies to achieve the highest perfor-
mance currently available in a dual JFET. Ion-implantation per-
mits the fabrication of matched JFETs on a monolithic bipolar
chip. Laser wafer drift trimming trims both the initial offset volt-
age and its drift with temperature to provide offsets as low as
100 µV (250 µV max) and drifts of 2.5 µV/°C max.
In addition to outstanding individual amplifier performance, the
AD647 offers guaranteed and tested matching performance on
critical parameters such as offset voltage, offset voltage drift and
bias currents.
The high level of performance makes the AD647 especially well
suited for high precision instrumentation amplifier applications
that previously would have required the costly selection and
matching of space wasting single amplifiers.
The AD647 is offered in four performance grades, three com-
mercial (the J, K and L) and one extended (the S). All are sup-
plied in hermetically sealed 8-pin TO-99 packages and are
available processed to MIL-STD-883B. The LCC version is
also available processed to MIL-STD-883B.
PRODUCT HIGHLIGHTS
1. The AD647 is guaranteed and tested to tight matching speci-
fications to ensure high performance and to eliminate the se-
lection and matching of single devices.
2. Laser wafer drift trimming reduces offset voltage and offset
voltage drifts to 250 µV and 2.5 µV/°C max.
3. Voltage noise is guaranteed at 4 µV p-p max (0.1 Hz to
10 Hz) on K, L and S grades.
4. Bias current (35 pA K, L, S; 75 pA J) is specified after five
minutes of operation.
5. Total supply current is a low 2.8 mA max.
6. High open loop gain ensures high linearity in precision instru-
mentation amplifier applications.
7. The standard dual amplifier pinout permits the direct substi-
tution of the AD647 for lower performance devices.
8. The AD647 is available in chip form.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703



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AD647 pdf
AD647–SPECIFICATIONS (@ +25؇C and VS = ؎15 V dc)
Model
AD647J
Min Typ Max
AD647K
Min Typ Max
AD647L
Min Typ Max
AD647S
Min Typ Max
Units
OPEN LOOP GAIN
VO = ± 10 V, RL 2 k
TMIN to TMAX, RL = 2 k
OUTPUT CHARACTERISTICS
Voltage @ RL = 2 k, TMIN to TMAX
Voltage @ RL = 10 k, TMIN to TMAX
Short Circuit Current
100,000
100,000
؎10 ± 12
؎12 ± 13
25
250,000
250,000
؎10 ± 12
؎12 ± 13
25
250,000
250,000
؎10 ± 12
؎12 ± 13
25
250,000
100,000
؎10 ± 12
؎12 ± 13
25
V/V
V/V
V
V
mA
FREQUENCY RESPONSE
Unity Gain Small Signal 1.0 1.0 1.0 1.0 MHz
Full Power Response
Slew Rate, Unity Gain
50
2.0 3.0
50
2.0 3.0
50
2.0 3.0
50
2.0 3.0
kHz
V/µs
INPUT OFFSET VOLTAGE1
Initial Offset
1.0 0.5 0.25 0.5 mV
Input Offset Voltage vs. Temperature
10
5
2.5 5.0 µV/°C
Input Offset Voltage vs. Supply,
TMIN to TMAX
INPUT BIAS CURRENT2
200 100 100 100 µV/V
Either Input
10 75
10 35
10 35
10 35 pA
Offset Current
5 2 2 2 pA
MATCHING CHARACTERISTICS3
Input Offset Voltage
1.0 0.5 0.25 0.5 mV
Input Offset Voltage TMIN to TMAX
10
5
2.5 10.0 µV/°C
Input Bias Current
35 25 25 25 pA
Crosstalk
–124
–124
–124
–124
dB
INPUT IMPEDANCE
Differential
Common Mode
1012ʈ6
1012ʈ6
1012ʈ6
1012ʈ6
1012ʈ6
1012ʈ6
1012ʈ6
1012ʈ6
MʈpF
MʈpF
INPUT VOLTAGE RANGE
Differential4
Common Mode
Common-Mode Rejection
± 20
؎10 ± 12
76
± 20
؎10 ± 12
80
± 20
؎10 ± 12
80
± 20
؎10 ± 12
80
V
V
dB
INPUT NOISE
Voltage 0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
POWER SUPPLY
Rated Performance
Operating
Quiescent Current
2 4 4 4 µV p-p
70 70 70 70 nV/Hz
45 45 45 45 nV/Hz
30 30 30 30 nV/Hz
25 25 25 25 nV/Hz
± 15 ± 15 ± 15 ± 15 V
± 5 ± 18 ± 5 ± 18 ± 5 ± 18 ± 5 ± 18 V
2.8 2.8 2.8 2.8 mA
TEMPERATURE RANGE
Operating, Rated Performance
Storage
0
–65
+70
+150
0
–65
+70
+150
0
–65
+70
+150
–55
–65
+125
+150
°C
°C
PACKAGE OPTION
TO-99 Style (H-08B)
LCC (E-20A)
AD647JH
AD647KH
AD647LH
AD647SH
AD647SE
AD647SE/883BH
NOTES
1Input Offset Voltage specifications are guaranteed after 5 minutes of operation at TA = +25°C.
2Bias Current specifications are guaranteed at maximum at either input after 5 minutes of operation at TA = +25°C. For higher temperatures, the current doubles every 10°C.
3Matching is defined as the difference between parameters of the two amplifiers.
4Defined as the maximum safe voltage between inputs, such that neither exceeds ± 10 V from ground.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications
are guaranteed, although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
–2– REV. A



Part Number AD647
Description Ultralow Drift/ Dual BiFET Op Amp
Maker Analog Devices - Analog Devices
Total Page 6 Pages
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