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Analog Devices Semiconductor Electronic Components Datasheet



AD600

Dual/ Low Noise/ Wideband Variable Gain Amplifiers



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AD600 pdf
a
Dual, Low Noise, Wideband
Variable Gain Amplifiers
AD600/AD602*
FEATURES
Two Channels with Independent Gain Control
“Linear in dB” Gain Response
Two Gain Ranges:
AD600: 0 dB to +40 dB
AD602: –10 dB to +30 dB
Accurate Absolute Gain: ؎0.3 dB
Low Input Noise: 1.4 nV/Hz
Low Distortion: –60 dBc THD at ؎1 V Output
High Bandwidth: DC to 35 MHz (–3 dB)
Stable Group Delay: ؎2 ns
Low Power: 125 mW (max) per Amplifier
Signal Gating Function for Each Amplifier
Drives High Speed A/D Converters
MIL-STD-883 Compliant and DESC Versions Available
APPLICATIONS
Ultrasound and Sonar Time-Gain Control
High Performance Audio and RF AGC Systems
Signal Measurement
PRODUCT DESCRIPTION
The AD600 and AD602 dual channel, low noise variable gain
amplifiers are optimized for use in ultrasound imaging systems,
but are applicable to any application requiring very precise gain,
low noise and distortion, and wide bandwidth. Each indepen-
dent channel provides a gain of 0 dB to +40 dB in the AD600
and –10 dB to +30 dB in the AD602. The lower gain of the
AD602 results in an improved signal-to-noise ratio at the out-
put. However, both products have the same 1.4 nV/Hz input
noise spectral density. The decibel gain is directly proportional
to the control voltage, is accurately calibrated, and is supply-
and temperature-stable.
To achieve the difficult performance objectives, a proprietary
circuit form—the X-AMP®—has been developed. Each channel
of the X-AMP comprises a variable attenuator of 0 dB to
–42.14 dB followed by a high speed fixed gain amplifier. In this
way, the amplifier never has to cope with large inputs, and can
benefit from the use of negative feedback to precisely define the
gain and dynamics. The attenuator is realized as a seven-stage
R-2R ladder network having an input resistance of 100 , laser-
trimmed to ± 2%. The attenuation between tap points is 6.02 dB;
the gain-control circuit provides continuous interpolation be-
tween these taps. The resulting control function is linear in dB.
X-AMP is a registered trademark of Analog Devices, Inc.
*Patented.
FUNCTIONAL BLOCK DIAGRAM
SCALING
REFERENCE
PRECISION PASSIVE
INPUT ATTENUATOR
GAT1
GATING
INTERFACE
C1HI
C1LO
VG
GAIN CONTROL
INTERFACE
A1HI
A1LO
0dB –6.02dB –12.04dB –18.06dB –22.08dB –30.1dB –36.12dB –42.14dB
500
R – 2R LADDER NETWORK
62.5
RF2
2.24k(AD600)
694(AD602)
RF1
20
FIXED GAIN
AMPLIFIER
41.07dB (AD600)
31.07dB (AD602)
A1OP
A1CM
The gain-control interfaces are fully differential, providing an
input resistance of ~15 Mand a scale factor of 32 dB/V (that
is, 31.25 mV/dB) defined by an internal voltage reference. The
response time of this interface is less than 1 µs. Each channel
also has an independent gating facility that optionally blocks sig-
nal transmission and sets the dc output level to within a few mil-
livolts of the output ground. The gating control input is TTL
and CMOS compatible.
The maximum gain of the AD600 is 41.07 dB, and that of the
AD602 is 31.07 dB; the –3 dB bandwidth of both models is
nominally 35 MHz, essentially independent of the gain. The
signal-to-noise ratio (SNR) for a 1 V rms output and a 1 MHz
noise bandwidth is typically 76 dB for the AD600 and 86 dB for
the AD602. The amplitude response is flat within ± 0.5 dB from
100 kHz to 10 MHz; over this frequency range the group delay
varies by less than ± 2 ns at all gain settings.
Each amplifier channel can drive 100 load impedances with
low distortion. For example, the peak specified output is ± 2.5 V
minimum into a 500 load, or ± 1 V into a 100 load. For a
200 load in shunt with 5 pF, the total harmonic distortion for
a ± 1 V sinusoidal output at 10 MHz is typically –60 dBc.
The AD600J and AD602J are specified for operation from 0°C
to +70°C, and are available in both 16-pin plastic DIP (N) and
16-pin SOIC (R). The AD600A and AD602A are specified for
operation from –40°C to +85°C and are available in both 16-pin
cerdip (Q) and 16-pin SOIC (R).
The AD600S and AD602S are specified for operation from
–55°C to +125°C and are available in a 16-pin cerdip (Q) pack-
age and are MIL-STD-883 compliant. The AD600S and
AD602S are also available under DESC SMD 5962-94572.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703



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AD600 pdf
AD600/AD602–SPECIFICATIONS (Each amplifier section, at TA = +25؇C, VS = ؎5 V, –625 mV VG
+625 mV, RL = 500 , and CL = 5 pF, unless otherwise noted. Specifications for AD600 and AD602 are identical unless otherwise noted.)
Parameter
Conditions
AD600J/AD602J
AD600A/AD602A
Min Typ Max Min Typ Max Units
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Noise Spectral Density1
Noise Figure
Common-Mode Rejection Ratio
Pins 2 to 3; Pins 6 to 7
RS = 50 , Maximum Gain
RS = 200 , Maximum Gain
f = 100 kHz
98 100 102 95 100 105
2 2 pF
1.4 1.4 nV/Hz
5.3 5.3 dB
2 2 dB
30 30 dB
OUTPUT CHARACTERISTICS
–3 dB Bandwidth
Slew Rate
Peak Output2
Output Impedance
Output Short-Circuit Current
Group Delay Change vs. Gain
Group Delay Change vs. Frequency
Total Harmonic Distortion
VOUT = 100 mV rms
RL 500
f 10 MHz
f = 3 MHz; Full Gain Range
VG = 0 V, f = 1 MHz to 10 MHz
RL= 200 , VOUT = ± 1 V Peak, Rpd = 1 k
35
275
± 2.5 ± 3
2
50
±2
±2
–60
35
275
± 2.5 ± 3
2
50
±2
±2
–60
MHz
V/µs
V
mA
ns
ns
dBc
ACCURACY
AD600
Gain Error
Maximum Output Offset Voltage3
Output Offset Variation
AD602
Gain Error
Maximum Output Offset Voltage3
Output Offset Variation
0 dB to 3 dB Gain
3 dB to 37 dB Gain
37 dB to 40 dB Gain
VG = –625 mV to +625 mV
VG = –625 mV to +625 mV
–10 dB to –7 dB Gain
–7 dB to 27 dB Gain
27 dB to 30 dB Gain
VG = –625 mV to +625 mV
VG = –625 mV to +625 mV
0
+0.5 +1
–0.5 +0.5 +0.5 dB
–0.5 ± 0.2 +0.5 –0.1 ± 0.2 +1.0 dB
–1 –0.5 0
–1.5 –0.5 +0.5 dB
10 50
10 65 mV
10 50
10 65 mV
0
+0.5 +1
–0.5 +0.5 +1.5 dB
–0.5 ± 0.2 +0.5 0.1 ± 0.2 +1.0 dB
–1 –0.5 0
–1.5 –0.5 +0.5 dB
5 30
10 45 mV
5 30
10 45 mV
GAIN CONTROL INTERFACE
Gain Scaling Factor
Common-Mode Range
Input Bias Current
Input Offset Current
Differential Input Resistance
Response Rate
3 dB to 37 dB (AD600); –7 dB to 27 dB (AD602) 31.7 32
32.3 30.5 32
33.5 dB/V
–0.75
2.5 –0.75
2.5 V
0.35 1
0.35 1
µA
10 50
10 50 nA
Pins I to 16; Pins 8 to 9
15 15 50 M
Full 40 dB Gain Change
40 40 dB/µs
SIGNAL GATING INTERFACE
Logic Input “LO” (Output ON)
Logic Input “HI” (Output OFF)
Response Time
Input Resistance
Output Gated OFF
Output Offset Voltage
Output Noise Spectral Density
Signal Feedthrough @ 1 MHz
AD600
AD602
ON to OFF, OFF to ON
Pins 4 to 3 Pins 5 to 6
0.8 0.8 V
2.4 2.4 V
0.3 0.3 µs
30 30 k
± 10 ؎100
65
± 10 ؎400 mV
65 nV/Hz
–80 –80 dB
–70 –70 dB
POWER SUPPLY
Specified Operating Range
Quiescent Current
± 4.75
11
± 5.25 ± 4.75
12.5 11
± 5.25 V
14 mA
NOTES
1Typical open or short-circuited input; noise is lower when system is set to maximum gain and input is short-circuited. This figure includes the effects of both voltage
and current noise sources.
2Using resistive loads of 500 or greater, or with the addition of a 1 kpull-down resistor when driving lower loads
3The dc gain of the main amplifier in the AD600 is X113; thus an input offset of only 100 µV becomes an 11.3 mV output offset. In the AD602, the amplifier’s gain is
X35.7; thus, an input offset of 100 µV becomes a 3.57 mV output offset.
Specifications shown in boldface are tested on all production units at final electrical test Results from those tests are used to calculate outgoing quality levels. All min
and max specifications guaranteed, although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
–2– REV. A



Part Number AD600
Description Dual/ Low Noise/ Wideband Variable Gain Amplifiers
Maker Analog Devices - Analog Devices
Total Page 20 Pages
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