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Analog Devices Semiconductor Electronic Components Datasheet



AD1845

Parallel-Port 16-Bit SoundPort Stereo Codec


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AD1845 pdf
a
Parallel-Port 16-Bit
SoundPort® Stereo Codec
AD1845
FEATURES
Single-Chip Integrated ∑∆ Digital Audio Stereo Codec
Microsoft® and Windows® Sound System Compatible
MPC Level-2+ Compliant Mixing
16 mA Bus Drive Capability
Supports Two DMA Channels for Full Duplex Operation
On-Chip Capture and Playback FIFOs
Advanced Power-Down Modes
Programmable Gain and Attenuation
Sample Rates from 4.0 kHz to 50 kHz Derived from a
Single Clock or Crystal Input
68-Lead PLCC, 100-Lead TQFP Packages
Operation from +5 V Supplies
Byte-Wide Parallel Interface to ISA and EISA Buses
Pin Compatible with AD1848, AD1846, CS4248, CS4231
PRODUCT OVERVIEW
The Parallel Port AD1845 SoundPort Stereo Codec integrates
key audio data conversion and control functions into a single
integrated circuit. The AD1845 provides a complete, single chip
computer audio solution for business audio and multimedia
applications. The codec includes stereo audio converters, com-
plete on-chip filtering, MPC Level-2 compliant analog mixing,
programmable gain, attenuation and mute, a variable sample
frequency generator, FIFOs, and supports advanced power-
down modes. It provides a direct, byte-wide interface to both
ISA (“AT”) and EISA computer buses for simplified implemen-
tation on a computer motherboard or add-in card.
The AD1845 SoundPort Stereo Codec supports a DMA re-
quest/grant architecture for transferring data with the host com-
puter bus. One or two DMA channels can be supported.
Programmed I/O (PIO) mode is also supported for control
register accesses and for applications lacking DMA control.
Two input control lines support mixed direct and indirect ad-
dressing of thirty-seven internal control registers over this asyn-
chronous interface. The AD1845 includes dual DMA count
registers for full duplex operation enabling the AD1845 to cap-
ture data on one DMA channel and play back data on a separate
channel. The FIFOs on the AD1845 reduce the risk of losing
data when making DMA transfers over the ISA/EISA bus. The
FIFOs buffer data transfers and allow for relaxed timing in
acknowledging requests for capture and playback data.
(Continued on Page 9)
FUNCTIONAL BLOCK DIAGRAM
ANALOG
ANALOG SUPPLY
DIGITAL SUPPLY
CLOCK SOURCE POWER DOWN
RESET
DIGITAL
L_MIC
R_MIC
L_LINE
R_LINE
L_AUX1
R_AUX1
L_OUT
M_OUT
R_OUT
M_IN
L_AUX2
R_AUX2
0 dB/
20 dB
VARIABLE SAMPLE
FREQUENCY GENERATOR
L
M
U
XR
GAIN
GAIN
⌺⌬ A/D
CONVERTER
⌺⌬ A/D
CONVERTER
AD1845
-LAW
A-LAW
LINEAR
FIFO
MUTE
GAM
GAM
GAM
GAM = GAIN
ATTENTUATE
MUTE
DIGITAL MIX
ATTENUATE
L ATTENUATE
MUTE
⌺⌬ D/A
CONVERTER
R
ATTENUATE
MUTE
⌺⌬ D/A
CONVERTER
-LAW
A-LAW
LINEAR
GAM
GAM
FIFO
P
A
R
A
L
L
E
L
P
O
R
T
PLAYBACK REQ
PLAYBACK ACK
CAPTURE REQ
CAPTURE ACK
ADR1:0
DATA7:0
CS
RD
WR
BUS DRIVER
CONTROL
HOST DMA
INTERRUPT
EXTERNAL
CONTROL
REFERENCE
CONTROL
REGISTERS
SoundPort is a registered trademark of Analog Devices, Inc.
Microsoft and Windows are registered trademarks of Microsoft Corporation.
VREF_F VREF
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997



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AD1845 pdf
AD1845–SPECIFICATIONS
STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED
Temperature
25 °C
DAC Test Conditions
Digital Supply (VDD)
Analog Supply (VCC)
Word Rate (FS)
Input Signal
5.0
5.0
48
1008
V
V
kHz
Hz
Calibrated
0 dB Relative to Full Scale
16-Bit Linear Mode
10 kOutput Load
Analog Output Passband 20 Hz to 20 kHz
Mute Off, OL = 0
ADC FFT Size
2048
ADC Test Conditions
DAC FFT Size
8192
Calibrated
VIH
5V
0 dB Gain
VIL
0V
–1.0 dB Relative to Full Scale
Line Input
ANALOG INPUT
16-Bit Linear Mode
Min Typ
Input Voltage (RMS Values Assume Sine Wave Input)
Line
MIC with +20 dB Gain (MGE = 1)
MIC with 0 dB Gain (MGE = 0)
Input Impedance*
Input Capacitance
2.55
0.255
2.55
10
1
2.83
0.1
0.283
1
2.83
17
15
Max
3.35
0.335
3.35
PROGRAMMABLE GAIN AMPLIFIER–ADC
Step Size (All Steps Tested)
(0 dB to 22.5 dB)
PGA Gain Range Span
Min Typ Max
0.7 1.5 1.9
21.5 22.5 23.5
AUXILIARY LINE, MONO, AND MICROPHONE INPUT ANALOG GAIN/AMPLIFIERS/ATTENUATORS
Min Typ Max
Step Size : AUX1, AUX2, LINE, MIC (All Steps Tested)
(+12 dB to –30 dB)
(–31.5 dB to –34.5 dB)
Step Size: M_IN (All Steps Tested)
(0 dB to –39 dB)
(–42 dB to –45 dB)
Input Gain/Attenuation Range: AUX1, AUX2, LINE, MIC
Input Gain/Attenuation Range: M_IN
1.25 1.5
1 1.5
1.75
2.0
2.5 3.0 3.6
2.2 3.0 3.85
45.0 46.5 49.0
42 45 49
DIGITAL DECIMATION AND INTERPOLATION FILTERS*
Passband
Passband Ripple
Transition Band
Stopband
Stopband Rejection
Group Delay
Group Delay Variation Over Passband
*Guaranteed, not tested.
Min
0
0.4 × FS
0.6 × FS
74
Max
0.4 × FS
± 0.1
0.6 × FS
15/FS
0.0
Units
V rms
V p-p
V rms
V p-p
V rms
V p-p
k
pF
Units
dB
dB
Units
dB
dB
dB
dB
dB
dB
Units
Hz
dB
Hz
Hz
dB
µs
–2– REV. C



Part Number AD1845
Description Parallel-Port 16-Bit SoundPort Stereo Codec
Maker Analog Devices - Analog Devices
Total Page 30 Pages
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