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Atmel Electronic Components Datasheet



90S1200

8-Bit Microcontroller with 1K bytes In-System Programmable Flash


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90S1200 pdf
Features
Utilizes the AVR® RISC Architecture
AVR High-performance and Low-power RISC Architecture
89 Powerful Instructions Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Up to 12 MIPS Throughput at 12 MHz
Data and Non-volatile Program Memory
1K Byte of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
64 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
One 8-bit Timer/Counter with Separate Prescaler
On-chip Analog Comparator
Programmable Watchdog Timer with On-chip Oscillator
SPI Serial Interface for In-System Programming
Special Microcontroller Features
Low-power Idle and Power-down Modes
External and Internal Interrupt Sources
Selectable On-chip RC Oscillator for Zero External Components
Specifications
Low-power, High-speed CMOS Process Technology
Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
Active: 2.0 mA
Idle Mode: 0.4 mA
Power-down Mode: <1 µA
I/O and Packages
15 Programmable I/O Lines
20-pin PDIP, SOIC and SSOP
Operating Voltages
2.7 - 6.0V (AT90S1200-4)
4.0 - 6.0V (AT90S1200-12)
Speed Grades
0 - 4 MHz, (AT90S1200-4)
0 - 12 MHz, (AT90S1200-12)
Pin Configuration
8-bit
Microcontroller
with 1K Byte
of In-System
Programmable
Flash
AT90S1200
Rev. 0838HAVR03/02
1



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90S1200 pdf
Description
Block Diagram
The AT90S1200 is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. By executing powerful instructions in a single clock cycle, the AT90S1200
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to
optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with the 32 general purpose working reg-
isters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in
one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
Figure 1. The AT90S1200 Block Diagram
The architecture supports high-level languages efficiently as well as extremely dense
assembler code programs. The AT90S1200 provides the following features: 1K byte of
In-System Programmable Flash, 64 bytes EEPROM, 15 general purpose I/O lines, 32
general purpose working registers, internal and external interrupts, programmable
watchdog timer with internal oscillator, an SPI serial port for program downloading and
two software selectable power-saving modes. The Idle Mode stops the CPU while allow-
2 AT90S1200
0838HAVR03/02



Part Number 90S1200
Description 8-Bit Microcontroller with 1K bytes In-System Programmable Flash
Maker ATMEL Corporation - ATMEL Corporation
Total Page 30 Pages
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90S1200 8-Bit Microcontroller with 1K bytes In-System Programmable Flash 90S1200
ATMEL Corporation
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