This device contains six independent gates, each of which
performs the logic INVERT function.
n Guaranteed 4000V minimum ESD protection
Ordering Code: See Section 0
74F04SC (Note 1)
74F04SJ (Note 1)
54F04DM (Note 2)
54F04FM (Note 2)
54F04LM (Note 2)
14-Lead (0.300" Wide) Molded Dual-In-Line
14-Lead Ceramic Dual-In-Line
14-Lead (0.150" Wide) Molded Small Outline, JEDEC
14-Lead (0.300" Wide) Molded Small Outline, EIAJ
20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Pin Assignment for
DIP, SOIC and Flatpak
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation DS009456
PrintDate=1997/08/26 PrintTime=15:21:53 9457 ds009456 Rev. No. 1 cmserv Proof