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NXP Semiconductors Electronic Components Datasheet



74ABT20N

Dual 4-input NAND gate


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74ABT20N pdf
Philips Semiconductors
Dual 4-input NAND gate
Product specification
74ABT20
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
Tamb = 25°C;
GND = 0V
tPLH
tPHL
tOSLH
tOSHL
CIN
Propagation
delay
An, Bn, Cn, Dn
to Yn
Output to
Output skew
Input
capacitance
CL = 50pF;
VCC = 5V
VI = 0V or VCC
ICC
Total supply
current
Outputs disabled;
VCC = 5.5V
TYPICAL UNIT
2.7
2.2
ns
0.3 ns
3 pF
50 µA
PIN CONFIGURATION
A0 1
B0 2
NC 3
C0 4
D0 5
Y0 6
GND 7
14 VCC
13 D1
12 C1
11 NC
10 B1
9 A1
8 Y1
SA00350
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 2, 4, 5, 9,
10, 12, 13
An, Bn,
Cn, Dn
Data inputs
6, 8 Yn Data outputs
7 GND Ground (0V)
14 VCC Positive supply voltage
LOGIC SYMBOL
1 2 4 5 9 10 12 13
A0 B0 C0 D0 A1 B1 C1 D1
VCC = Pin 14
GND = Pin 7
Y0 Y1
68
SA00351
LOGIC DIAGRAM
A0
B0
C0
D0
1
2
4
5
VCC = Pin 14
GND = Pin 7
9
A1
10
B1
12
C1
13
D1
6
Y0
8
Y1
LOGIC SYMBOL (IEEE/IEC)
1&
2
4
5
6
SA00352
9
10
12
13
FUNCTION TABLE
INPUTS
An Bn Cn
LXX
XLX
XXL
XXX
HH
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
H
8
SF00068
OUTPUT
Dn Yn
XH
XH
XH
LH
HL
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIP
14-Pin plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT20 N
74ABT20 D
74ABT20 DB
74ABT20 PW
NORTH AMERICA
74ABT20 N
74ABT20 D
74ABT20 DB
74ABT20PW DH
DWG NUMBER
SOT27-1
SOT108-1
SOT337-1
SOT402-1
1995 Sep 22
1 853-1811 15793



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74ABT20N pdf
Philips Semiconductors
Dual 4-input NAND gate
Product specification
74ABT20
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC DC supply voltage
–0.5 to +7.0
V
IIK DC input diode current
VI DC input voltage3
VI < 0
–18
–1.2 to +7.0
mA
V
IOK
VOUT
DC output diode current
DC output voltage3
VO < 0
output in Off or High state
–50
–0.5 to +5.5
mA
V
IOUT
DC output current
output in Low state
40 mA
Tstg Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VIH
VIL
IOH
IOL
t/v
Tamb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
LIMITS
MIN MAX
4.5 5.5
0 VCC
2.0
0.8
–15
20
0 10
–40 +85
UNIT
V
V
V
V
mA
mA
ns/V
°C
DC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
Tamb = +25°C
MIN TYP MAX
Tamb = –40°C
to +85°C
MIN MAX
VIK Input clamp voltage
VCC = 4.5V; IIK = –18mA
–0.9 –1.2
–1.2
VOH High-level output voltage
VCC = 4.5V; IOH = –15mA; VI = VIL or VIH
2.5 2.9
2.5
VOL Low-level output voltage
VCC = 4.5V; IOL = 20mA; VI = VIL or VIH
0.35 0.5
0.5
II Input leakage current
VCC = 5.5V; VI = GND or 5.5V
±0.01 ±1.0
±1.0
IOFF Power-off leakage current
VCC = 0.0V; VO or VI 4.5V
±5.0 ±100
±100
ICEX
IO
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC
Output current1
VCC = 5.5V; VO = 2.5V
5.0 50
50
–50 –75 –180 –50 –180
ICC Quiescent supply current
VCC = 5.5V; VI = GND or VCC
2 50
50
ICC
Additional supply current per VCC = 5.5V; One data input at 3.4V, other
input pin2
inputs at VCC or GND
0.25 500
500
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
UNIT
V
V
V
µA
µA
µA
mA
µA
µA
1995 Sep 22
2



Part Number 74ABT20N
Description Dual 4-input NAND gate
Maker NXP - NXP
Total Page 3 Pages
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