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NXP Semiconductors Electronic Components Datasheet



74ABT16841A

20-bit bus interface latch



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74ABT16841A pdf
INTEGRATED CIRCUITS
74ABT16841A
20-bit bus interface latch (3-State)
Product data
Replaces data sheet 74ABT16841A/74ABTH16841A of 2002 Dec 17
2004 Feb 02
Philips
Semiconductors



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74ABT16841A pdf
Philips Semiconductors
20-bit bus interface latch (3-State)
Product data
74ABT16841A
FEATURES
High speed parallel latches
Live insertion/extraction permitted
Extra data width for wide address/data paths or buses carrying
parity
Power-up 3-State
Power-up reset
Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
Output capability: +64 mA / –32 mA
Latch-up protection exceeds 500 mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT16841A Bus interface latch is designed to provide extra
data width for wider data/address paths of buses carrying parity.
The 74ABT16841A consists of two sets of ten D-type latches with
3-State outputs. The flip-flops appear transparent to the data when
Latch Enable (nLE) is HIGH. This allows asynchronous operation,
as the output transition follows the data in transition. On the nLE
HIGH-to-LOW transition, the data that meets the set-up and hold
time is latched.
Data appears on the bus when the Output Enable (nOE) is LOW.
When nOE is HIGH the output is in the high-impedance state.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
ICCL
Propagation delay
nDx to nQx
Input capacitance
Output capacitance
Quiescent supply current
CONDITIONS
Tamb = 25 °C; GND = 0 V
CL = 50 pF; VCC = 5 V
VI = 0 V or VCC
VO = 0 V or VCC; 3-State
Outputs disabled; VCC = 5.5 V
Outputs LOW; VCC = 5.5 V
ORDERING INFORMATION
Tamb = –40 °C to +85 °C
Type number
Package
Name
74ABT16841ADL
SSOP56
74ABT16841ADGG TSSOP56
Description
plastic shrink small outline package; 56 leads; body width 7.5 mm
plastic thin shrink small outline package; 56 leads; body width 6.1 mm
TYPICAL UNIT
3.1
2.2
ns
4 pF
7 pF
500 µA
10 mA
Version
SOT371-1
SOT364-1
PIN DESCRIPTION
PIN NUMBER
55, 54, 52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
2, 3, 5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1, 28
56, 29
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
SYMBOL
1D0 – 1D9
2D0 – 2D9
1Q0 – 1Q9
2Q0 – 2Q9
1OE, 2OE
1LE, 2LE
GND
VCC
Data inputs
FUNCTION
Data outputs
Output enable inputs (active-LOW)
Latch enable inputs (active rising edge)
Ground (0 V)
Positive supply voltage
2004 Feb 02
2



Part Number 74ABT16841A
Description 20-bit bus interface latch
Maker NXP - NXP
Total Page 11 Pages
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