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74ABT16543

16-bit latched transceivers with dual enable 3-State



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74ABT16543 pdf
INTEGRATED CIRCUITS
74ABT16543
74ABTH16543
16-bit latched transceivers with
dual enable (3-State)
Product specification
Supersedes data of 1995 Aug 17
IC23 Data Handbook
1998 Feb 27
Philips
Semiconductors



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74ABT16543 pdf
Philips Semiconductors
16-bit latched transceivers with dual enable
(3-State)
Product specification
74ABT16543
74ABTH16543
FEATURES
Two 8-bit octal transceivers with D-type latch
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Multiple VCC and GND pins minimize switching noise
Back-to-back registers for storage
Separate controls for data flow in each direction
74ABTH16543 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
See 74ABT161543 for same function with Master Reset control
pins
DESCRIPTION
The 74ABT16543 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16543 16-bit registered transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (nLEAB, nLEBA) and Output
Enable (nOEAB, nOEBA) inputs are provided for each register to
permit independent control of data transfer in either direction. The
outputs are guaranteed to sink 64mA.
Two options are available, 74ABT16543 which does not have the
bus-hold feature and 74ABTH16543 which incorporates the
bus-hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
CI/O
ICCZ
ICCL
Propagation delay
nAx to nBx
Input capacitance
I/O capacitance
Quiescent supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
VO = 0V or VCC; 3-State
Outputs disabled; VCC = 5.5V
Outputs low; VCC = 5.5V
TYPICAL
2.5
2.2
3
7
550
9
UNIT
ns
pF
pF
µA
mA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT16543 DL
–40°C to +85°C
74ABT16543 DGG
–40°C to +85°C
74ABTH16543 DL
–40°C to +85°C
74ABTH16543 DGG
NORTH AMERICA
BT16543 DL
BT16543 DGG
BH16543 DL
BH16543 DGG
DWG NUMBER
SOT371-1
SOT364-1
SOT371-1
SOT364-1
PIN DESCRIPTION
PIN NUMBER
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40,38, 37, 36, 34, 33
1, 56
28, 29
3, 54
26, 31
2, 55
27, 30
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
1998 Feb 27
SYMBOL
1A0 – 1A7,
2A0 – 2A7
1B0 – 1B7,
2B0 – 2B7
1OEAB, 1OEBA,
2OEAB, 2OEBA
1EAB, 1EBA,
2EAB, 2EBA
1LEAB, 1LEBA,
2LEAB, 2LEBA
GND
VCC
2
NAME AND FUNCTION
Data inputs/outputs
Data inputs/outputs
A to B / B to A Output Enable inputs (active-Low)
A to B / B to A Enable inputs (active-Low)
A to B / B to A Latch Enable inputs (active-Low)
Ground (0V)
Positive supply voltage
853-1739 19026



Part Number 74ABT16543
Description 16-bit latched transceivers with dual enable 3-State
Maker NXP - NXP
Total Page 12 Pages
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