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NXP Semiconductors Electronic Components Datasheet



4027

Dual JK flip-flop



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4027 pdf
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4027B
flip-flops
Dual JK flip-flop
Product specification
File under Integrated Circuits, IC04
January 1995



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4027 pdf
Philips Semiconductors
Dual JK flip-flop
Product specification
HEF4027B
flip-flops
DESCRIPTION
The HEF4027B is a dual JK flip-flop which is
edge-triggered and features independent set direct
(SD), clear direct (CD), clock (CP) inputs and outputs
(O,O). Data is accepted when CP is LOW, and transferred
to the output on the positive-going edge of the clock. The
active HIGH asynchronous clear-direct (CD) and set-direct
(SD) are independent and override the J, K, and CP inputs.
The outputs are buffered for best system performance.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
FUNCTION TABLES
INPUTS
SD CD CP J
H LXX
L HXX
H HXX
K
X
X
X
OUTPUTS
OO
HL
LH
HH
INPUTS
OUTPUTS
SD CD CP J K On + 1
On + 1
LL
LL
no change
LL
HL
H
L
LL
LH
L
H
LL
HH
On
On
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
On + 1 = state after clock positive transition
PINNING
J,K synchronous inputs
CP clock input (L to H edge-triggered)
SD asynchronous set-direct input (active HIGH)
CD asynchronous clear-direct input (active HIGH)
O true output
O complement output
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
HEF4027BP(N): 16-lead DIL; plastic (SOT38-1)
HEF4027BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)
HEF4027BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
FAMILY DATA, IDD LIMITS category FLIP-FLOPS
See Family Specifications
January 1995
2



Part Number 4027
Description Dual JK flip-flop
Maker NXP - NXP
Total Page 5 Pages
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