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Si8920 Datasheet
ISOLATED AMPLIFIER

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Si8920
ISOLATED AMPLIFIER FOR CURRENT SHUNT MEASUREMENT
Features
Low voltage differential input
±100 mV and ±200 mV options
Low signal delay: 0.75 µs
Input offset: 0.2 mV
Gain error: <0.5%
Excellent drift specifications
1 µV/°C offset drift
60 ppm/°C gain drift
Nonlinearity: 0.1% full-scale
Low noise: 0.10 mVrms over
100 kHz bandwidth
High common-mode transient
immunity: 75 kV/µs
Compact packages
16-pin wide body SOIC
8-pin surface mount DIP
–40 to 125 °C
AEC-Q100
Applications
Industrial, HEV and renewable
energy inverters
AC, Brushless, and DC motor
controls and drives
Variable speed motor control in
consumer white goods
Isolated switch mode and UPS
power supplies
Safety Approvals (Pending)
UL 1577 recognized
Up to 5000 Vrms for 1 minute
CSA component notice 5A
approval
VDE certification conformity
VDE0884 Part 10
(basic/reinforced insulation)
CQC certification approval
GB4943.1
Description
The Si8920 is a galvanically isolated analog amplifier. The low-voltage
differential input is ideal for measuring voltage across a current shunt
resistor or for any place where a sensor must be isolated from the control
system. The output is a differential analog signal amplified by either 8.1x
or 16.2x.
The very low signal delay of the Si8920 allows control systems to respond
quickly to fault conditions or changes in load. Low offset and gain drift
ensure that accuracy is maintained over the entire operating temperature
range. Exceptionally high common-mode transient immunity means that
the Si8920 delivers accurate measurements even in the presence of high-
power switching as is found in motor drive systems and inverters.
The Si8920 isolated amplifier utilizes Silicon Labs’ proprietary isolation
technology. It supports up to 5.0 kVrms withstand voltage per UL1577.
This technology enables higher performance, reduced variation with
temperature and age, tighter part-to-part matching, and longer lifetimes
compared to other isolation technologies.
Ordering Information:
See page 14.
Pin Assignments
VDDA 1
AIP 2
AIN 3
GNDA 4
Si8920
8 VDDB
7 AOP
6 AON
5 GNDB
VDDA 1
AIP 2
AIN 3
GNDA 4
NC 5
NC 6
NC 7
GNDA 8
16 GNDB
15 NC
14 VDDB
13 AOP
Si8920
12 NC
11 AON
10 NC
9 GNDB
Patents pending
Preliminary Rev. 0.5 8/15
Copyright © 2015 by Silicon Laboratories
Si8920
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.


Si8920 Datasheet
ISOLATED AMPLIFIER

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Si8920
2 Preliminary Rev. 0.5


Si8920 Datasheet
ISOLATED AMPLIFIER

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TABLE OF CONTENTS
Si8920
Section
Page
1. Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1. Regulatory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3. Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5. Current Sense Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8. Package Outline: DIP8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9. Land Pattern: DIP8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10. Package Outline: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
11. Land Pattern: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
12. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
12.1. Si8920 Top Marking (DIP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
12.2. Top Marking Explanation (DIP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
12.3. Si8920 Top Marking (SOIC-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
12.4. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Preliminary Rev. 0.5
3


Si8920 Datasheet
ISOLATED AMPLIFIER

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Si8920
1. Functional Block Diagram
VDDA
UVLO
UVLO
AIP
AIN
GNDA
+_
Mod
DeMod +_
Figure 1. Si8920 Block Diagram
VDDB
AOP
AON
GNDB
4 Preliminary Rev. 0.5


Si8920 Datasheet
ISOLATED AMPLIFIER

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2. Electrical Specifications
Si8920
Table 1. Electrical Specifications
VDDA, VDDB = 5 V, TA = –40 to +125 °C; typical specs at 25 °C
Parameter
Input Side Supply Voltage
Input Supply Current
Output Side Supply Voltage
Output Supply Current
VDD Undervoltage Threshold
Symbol
VDDA
IVDDA
VDDB
IVDDB
VDDUV+
Test Condition
Min Typ Max
3.0 5.5
VAIP = VAIN @ 3.3 V
3.2
3.0
4.2
5.5
5.5
VAIP = VAIN @ 3.3 V
VDDA, VDDB rising
2.3
3.2
2.7
4.1
VDD Undervoltage Threshold
VDDUV–
VDDA, VDDB falling
2.6
VDD Undervoltage Hysteresis
Amplifier Bandwidth
VDDHYS
100
750
Amplifier Input
Specified Full Scale Si8920A
Input Amplitude
Si8920B
VAIP – VAIN
–100
–200
100
200
Maximum Input Volt- Si8920A
age Before Clipping Si8920B
VAIP – VAIN
±125
±250
Common-Mode Operating
Range
VCM
–0.2 1
Input referred offset
VOS
0.2 1.5
Input offset drift
Differential Input
impedance
Si8920A
Si8920B
VOST
RIN
1.0
20
37.2
Amplifier Output
Full-scale Output
VAOP – VAON
1.58 1.62 1.65
Gain
Si8920A
16.2
Si8920B
8.1
Gain Error
Gain Error Drift
TA = 25 °C
–0.5
60
0.5
Output Common Mode Voltage (VAOP + VAON)/2
1.02 1.1
1.17
Output Noise
Si8920A
100 kHz bandwidth
0.14 0.28
Si8920B
100 kHz bandwidth
0.10 0.20
Nonlinearity
Si8920A
Si8920B
0.15 0.50
0.10 0.30
Output Resistive Load
Output Capacitive Load
Timing
RLOAD
CLOAD
5
100
Signal Delay
tPD 50% to 50%
50% to 99%
10% to 90%
0.75
1.85
0.42
Common-Mode Transient
Immunity*
CMTI
AIP = AIN = AGND,
VCM = 1500 V
50
75
*Note: An analog CMTI failure is defined as an output error of more than 100 mV persisting for at least 1 µs.
Units
V
mA
V
mA
V
V
mV
kHz
mV
mV
mV
mV
V
mV
µV/°C
k
k
Vpk
%
ppm/°C
V
mVrms
mVrms
%
%
k
pF
µs
kV/µs
Preliminary Rev. 0.5
5



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